Grammar-based hardware synthesis from port-size independent specifications
- Author
- ÖBERG, J1 ; KUMAR, A2 ; HEMANI, A1
[1] ESDLab, Department of Electronics, Royal Institute of Technology (KTH), Stockholm, Sweden
[2] Department of Computer Science, Indian Institute of Technology, New Delhi, India - Source
IEEE transactions on very large scale integration (VLSI) systems. 2000, Vol 8, Num 2, pp 184-194 ; ref : 27 ref
- ISSN
- 1063-8210
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, Piscataway, NJ
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Appui Entrée sortie Essai Etude expérimentale Exploration Grammaire Maintenance Matériel(informatique) Méthodologie Spécification Transmission asynchrone
- Keyword (en)
- Support(construction) Input output Test Experimental study Exploration Grammar Maintenance Computer hardware Methodology Specification Asynchronous transmission
- Keyword (es)
- Apoyo Entrada salida Ensayo Estudio experimental Exploración Gramática Mantenimiento Material (informática) Metodología Especificación Transmisión asincrónica
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03J Hardware / 001D03J01 General
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 1337075
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/92.831438 
https://dx.doi.org/10.1109/92.831438
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