Optimising and adapting high-level hardware designs
- Author
- COUTINHO, José Gabriel F1 ; LUK, Wayne1
[1] Department of Computing, Imperial College, 180 Queen's Gate, London SW7 2BZ, United Kingdom - Conference title
- 2002 IEEE international conference on field-programmable technology ( FPT) (Hong Kong, 16-18 December 2002)
- Conference name
- IEEE international conference on field-programmable technology (Hong Kong 2002-12-16)
- Author (monograph)
- IEEE, United States (Organiser of meeting)
- Source
2002 IEEE international conference on field-programmable technology ( FPT) (Hong Kong, 16-18 December 2002). 2002, pp 150-157, 8 p ; ref : 12 ref
- ISBN
- 0-7803-7574-2
- Scientific domain
- Electronics; Computer science
- Publisher
- IEEE, New York, NY
- Publication country
- United States
- Document type
- Conference Paper
- Language
- English
- Keyword (fr)
- Architecture parallèle Caractéristique temps Conception système Matériel(informatique) Optimisation Ordonnancement Synthèse haut niveau
- Keyword (en)
- Parallel architectures Timing properties System design Computer hardware Optimization Scheduling High level synthesis
- Keyword (es)
- Concepción sistema Material (informática) Optimización Ordonamiento Sintesis alto nivel
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03J Hardware / 001D03J01 General
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 14841133
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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