A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS
- Author
- ANCEAU F
E.N.S.I.M.A.G./GRENOBLE 38401/FRA - Source
- IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1982; VOL. 17; NO 1; PP. 51-56; BIBL. 7 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- CIRCUIT INTEGRE CIRCUIT VLSI CIRCUIT SYNCHRONE ELECTRONIQUE
- Keyword (en)
- INTEGRATED CIRCUIT ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL82X0222325
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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"O:13:\"PanistOpenUrl\":36:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000idc\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:0:\"\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:9:\"\u0000*\u0000jtitle\";s:0:\"\";s:9:\"\u0000*\u0000stitle\";s:0:\"\";s:7:\"\u0000*\u0000date\";s:4:\"1982\";s:9:\"\u0000*\u0000volume\";s:0:\"\";s:8:\"\u0000*\u0000issue\";s:0:\"\";s:8:\"\u0000*\u0000spage\";s:0:\"\";s:8:\"\u0000*\u0000epage\";s:0:\"\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:0:\"\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:6:\"ANCEAU\";s:10:\"\u0000*\u0000aufirst\";s:1:\"F\";s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";a:0:{}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:0:\"\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:8:\"\u0000*\u0000place\";s:0:\"\";s:6:\"\u0000*\u0000pub\";s:0:\"\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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"O:12:\"IstexOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:0:\"\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:9:\"\u0000*\u0000jtitle\";s:0:\"\";s:9:\"\u0000*\u0000stitle\";s:0:\"\";s:7:\"\u0000*\u0000date\";s:4:\"1982\";s:9:\"\u0000*\u0000volume\";s:0:\"\";s:8:\"\u0000*\u0000issue\";s:0:\"\";s:8:\"\u0000*\u0000spage\";s:0:\"\";s:8:\"\u0000*\u0000epage\";s:0:\"\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:0:\"\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:6:\"ANCEAU\";s:10:\"\u0000*\u0000aufirst\";s:1:\"F\";s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";a:0:{}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:0:\"\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:8:\"\u0000*\u0000place\";s:0:\"\";s:6:\"\u0000*\u0000pub\";s:0:\"\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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"O:16:\"EuropePMCOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:0:\"\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:9:\"\u0000*\u0000jtitle\";s:0:\"\";s:9:\"\u0000*\u0000stitle\";s:0:\"\";s:7:\"\u0000*\u0000date\";s:4:\"1982\";s:9:\"\u0000*\u0000volume\";s:0:\"\";s:8:\"\u0000*\u0000issue\";s:0:\"\";s:8:\"\u0000*\u0000spage\";s:0:\"\";s:8:\"\u0000*\u0000epage\";s:0:\"\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:0:\"\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:6:\"ANCEAU\";s:10:\"\u0000*\u0000aufirst\";s:1:\"F\";s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";a:0:{}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:0:\"\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:8:\"\u0000*\u0000place\";s:0:\"\";s:6:\"\u0000*\u0000pub\";s:0:\"\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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"O:11:\"BaseOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:0:\"\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:9:\"\u0000*\u0000jtitle\";s:0:\"\";s:9:\"\u0000*\u0000stitle\";s:0:\"\";s:7:\"\u0000*\u0000date\";s:4:\"1982\";s:9:\"\u0000*\u0000volume\";s:0:\"\";s:8:\"\u0000*\u0000issue\";s:0:\"\";s:8:\"\u0000*\u0000spage\";s:0:\"\";s:8:\"\u0000*\u0000epage\";s:0:\"\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:0:\"\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:6:\"ANCEAU\";s:10:\"\u0000*\u0000aufirst\";s:1:\"F\";s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";a:0:{}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:0:\"\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:8:\"\u0000*\u0000place\";s:0:\"\";s:6:\"\u0000*\u0000pub\";s:0:\"\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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"O:12:\"ArXivOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:0:\"\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:9:\"\u0000*\u0000jtitle\";s:0:\"\";s:9:\"\u0000*\u0000stitle\";s:0:\"\";s:7:\"\u0000*\u0000date\";s:4:\"1982\";s:9:\"\u0000*\u0000volume\";s:0:\"\";s:8:\"\u0000*\u0000issue\";s:0:\"\";s:8:\"\u0000*\u0000spage\";s:0:\"\";s:8:\"\u0000*\u0000epage\";s:0:\"\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:0:\"\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:6:\"ANCEAU\";s:10:\"\u0000*\u0000aufirst\";s:1:\"F\";s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";a:0:{}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:0:\"\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:48:\"A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMS\";s:8:\"\u0000*\u0000place\";s:0:\"\";s:6:\"\u0000*\u0000pub\";s:0:\"\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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