A DESCRIPTION OF MOS INTERNODAL CAPACITANCES FOR TRANSIENT SIMULATIONS
- Author
- TAYLOR GW; FICHTNER W; SIMMONS JG
BELL LAB./MURRAY HILL NJ 07974/USA - Source
- IEEE TRANS. COMPUT.-AIDED DES. INTEGR. CIRCUITS SYST.; ISSN 50629X; USA; DA. 1982; VOL. 1; NO 4; PP. 150-156; BIBL. 9 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- TRANSISTOR EFFET CHAMP TRANSISTOR MOS CANAL TRANSISTOR SIMULATION CAPACITE ELECTRIQUE CARACTERISTIQUE CHARGE TENSION ELECTRONIQUE
- Keyword (en)
- FIELD EFFECT TRANSISTOR MOS TRANSISTOR TRANSISTOR CHANNEL SIMULATION CAPACITANCE ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL83X0157432
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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Istex access
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Europe PubMed Central access
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