Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA
- Author
- TONG YAN TEE1 ; HUN SHEN NG1 ; ZHAOWEI ZHONG2
[1] STMicroelectronics, 629 Lorong 4/6 Toa Payoh, 319521, Singapore
[2] Nanyang Technological University, School of MPE, 50 Nanyang Avenue, 639798, Singapore - Source
Microelectronics and reliability. 2006, Vol 46, Num 12, pp 2131-2138, 8 p ; ref : 20 ref
- CODEN
- MCRLAS
- ISSN
- 0026-2714
- Scientific domain
- Electronics
- Publisher
- Elsevier, Oxford
- Publication country
- United Kingdom
- Document type
- Article
- Language
- English
- Keyword (fr)
- Alliage eutectique Assemblage brasage tendre Assemblage circuit intégré Carte électronique Circuit imprimé Circuit intégré Comportement thermique Contact bosse Cycle thermique Durabilité Durée vie fatigue Défaillance Essai thermique Fiabilité Gain Interconnexion Matrice formage Matériau non linéaire Matériel télécommunication Modèle 3 dimensions Modélisation Métal fondu brasage tendre Packaging électronique Profil mince Propriété matériau Propriété non linéaire Puce à bosses Technologie BGA Microcâblage
- Keyword (en)
- Eutectic alloy Soldered joint Integrated circuit bonding Printed circuit board Printed circuit Integrated circuit Thermal behavior Solder bump Thermal cycle Durability Fatigue life Failures Thermal test Reliability Gain Interconnection Die Non linear material Telecommunication equipment Three dimensional model Modeling Solder metal Electronic packaging Thin profile Properties of materials Non linear properties Flip-chip BGA technology Wire bonding
- Keyword (es)
- Aleación eutéctica Junta soldada Tarjeta electronica Circuito imprimido Circuito integrado Comportamiento térmico Contacto con bollos Ciclo térmico Durabilidad Longevidad fatiga Fallo Prueba térmica Fiabilidad Ganancia Interconexión Matriz formadora Material no lineal Equipo telecomunicaciones Modelo 3 dimensiones Modelización Metal fundido soldeo blando Packaging electrónico Perfil delgado Propiedad material Propiedad no lineal Tecnología BGA Unión por hilo
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03C Materials
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03D Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06A Design. Technologies. Operation analysis. Testing
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 18186333
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Access to the document
Install on your browser
DOI
10.1016/j.microrel.2006.01.010 
https://dx.doi.org/10.1016/j.microrel.2006.01.010
"O:13:\"PanistOpenUrl\":36:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000idc\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:9:\"\u0000*\u0000jtitle\";s:32:\"Microelectronics and reliability\";s:9:\"\u0000*\u0000stitle\";s:21:\"Microelectron. reliab\";s:7:\"\u0000*\u0000date\";s:4:\"2006\";s:9:\"\u0000*\u0000volume\";s:2:\"46\";s:8:\"\u0000*\u0000issue\";s:2:\"12\";s:8:\"\u0000*\u0000spage\";s:4:\"2131\";s:8:\"\u0000*\u0000epage\";s:4:\"2138\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0026-2714\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:12:\"TONG YAN TEE\";s:10:\"\u0000*\u0000aufirst\";s:0:\"\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:11:\"HUN SHEN NG\";i:1;s:13:\"ZHAOWEI ZHONG\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"MCRLAS\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:8:\"\u0000*\u0000place\";s:6:\"Oxford\";s:6:\"\u0000*\u0000pub\";s:8:\"Elsevier\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Panist access
"O:12:\"IstexOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:9:\"\u0000*\u0000jtitle\";s:32:\"Microelectronics and reliability\";s:9:\"\u0000*\u0000stitle\";s:21:\"Microelectron. reliab\";s:7:\"\u0000*\u0000date\";s:4:\"2006\";s:9:\"\u0000*\u0000volume\";s:2:\"46\";s:8:\"\u0000*\u0000issue\";s:2:\"12\";s:8:\"\u0000*\u0000spage\";s:4:\"2131\";s:8:\"\u0000*\u0000epage\";s:4:\"2138\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0026-2714\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:12:\"TONG YAN TEE\";s:10:\"\u0000*\u0000aufirst\";s:0:\"\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:11:\"HUN SHEN NG\";i:1;s:13:\"ZHAOWEI ZHONG\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"MCRLAS\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:8:\"\u0000*\u0000place\";s:6:\"Oxford\";s:6:\"\u0000*\u0000pub\";s:8:\"Elsevier\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Istex access
"O:16:\"UnpaywallOpenUrl\":35:{s:8:\"\u0000*\u0000email\";s:27:\"assistance-portail@inist.fr\";s:6:\"\u0000*\u0000fmt\";N;s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";N;s:7:\"\u0000*\u0000pmid\";N;s:9:\"\u0000*\u0000atitle\";N;s:9:\"\u0000*\u0000jtitle\";N;s:9:\"\u0000*\u0000stitle\";N;s:7:\"\u0000*\u0000date\";N;s:9:\"\u0000*\u0000volume\";N;s:8:\"\u0000*\u0000issue\";N;s:8:\"\u0000*\u0000spage\";N;s:8:\"\u0000*\u0000epage\";N;s:8:\"\u0000*\u0000pages\";N;s:7:\"\u0000*\u0000issn\";N;s:8:\"\u0000*\u0000eissn\";N;s:9:\"\u0000*\u0000aulast\";N;s:10:\"\u0000*\u0000aufirst\";N;s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";N;s:9:\"\u0000*\u0000aucorp\";N;s:7:\"\u0000*\u0000isbn\";N;s:8:\"\u0000*\u0000coden\";N;s:8:\"\u0000*\u0000genre\";N;s:7:\"\u0000*\u0000part\";N;s:9:\"\u0000*\u0000btitle\";N;s:8:\"\u0000*\u0000title\";N;s:8:\"\u0000*\u0000place\";N;s:6:\"\u0000*\u0000pub\";N;s:10:\"\u0000*\u0000edition\";N;s:9:\"\u0000*\u0000tpages\";N;s:9:\"\u0000*\u0000series\";N;s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";N;}"
Unpaywall access
"O:16:\"EuropePMCOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:9:\"\u0000*\u0000jtitle\";s:32:\"Microelectronics and reliability\";s:9:\"\u0000*\u0000stitle\";s:21:\"Microelectron. reliab\";s:7:\"\u0000*\u0000date\";s:4:\"2006\";s:9:\"\u0000*\u0000volume\";s:2:\"46\";s:8:\"\u0000*\u0000issue\";s:2:\"12\";s:8:\"\u0000*\u0000spage\";s:4:\"2131\";s:8:\"\u0000*\u0000epage\";s:4:\"2138\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0026-2714\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:12:\"TONG YAN TEE\";s:10:\"\u0000*\u0000aufirst\";s:0:\"\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:11:\"HUN SHEN NG\";i:1;s:13:\"ZHAOWEI ZHONG\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"MCRLAS\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:8:\"\u0000*\u0000place\";s:6:\"Oxford\";s:6:\"\u0000*\u0000pub\";s:8:\"Elsevier\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Europe PubMed Central access
"O:11:\"BaseOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:9:\"\u0000*\u0000jtitle\";s:32:\"Microelectronics and reliability\";s:9:\"\u0000*\u0000stitle\";s:21:\"Microelectron. reliab\";s:7:\"\u0000*\u0000date\";s:4:\"2006\";s:9:\"\u0000*\u0000volume\";s:2:\"46\";s:8:\"\u0000*\u0000issue\";s:2:\"12\";s:8:\"\u0000*\u0000spage\";s:4:\"2131\";s:8:\"\u0000*\u0000epage\";s:4:\"2138\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0026-2714\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:12:\"TONG YAN TEE\";s:10:\"\u0000*\u0000aufirst\";s:0:\"\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:11:\"HUN SHEN NG\";i:1;s:13:\"ZHAOWEI ZHONG\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"MCRLAS\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:8:\"\u0000*\u0000place\";s:6:\"Oxford\";s:6:\"\u0000*\u0000pub\";s:8:\"Elsevier\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Base Search access
"O:12:\"ArXivOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:30:\"10.1016\/j.microrel.2006.01.010\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:9:\"\u0000*\u0000jtitle\";s:32:\"Microelectronics and reliability\";s:9:\"\u0000*\u0000stitle\";s:21:\"Microelectron. reliab\";s:7:\"\u0000*\u0000date\";s:4:\"2006\";s:9:\"\u0000*\u0000volume\";s:2:\"46\";s:8:\"\u0000*\u0000issue\";s:2:\"12\";s:8:\"\u0000*\u0000spage\";s:4:\"2131\";s:8:\"\u0000*\u0000epage\";s:4:\"2138\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0026-2714\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:12:\"TONG YAN TEE\";s:10:\"\u0000*\u0000aufirst\";s:0:\"\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:11:\"HUN SHEN NG\";i:1;s:13:\"ZHAOWEI ZHONG\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"MCRLAS\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:93:\"Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA\";s:8:\"\u0000*\u0000place\";s:6:\"Oxford\";s:6:\"\u0000*\u0000pub\";s:8:\"Elsevier\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
arXiv access
