Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications
- Author
- MOLDOVAN, Oana1 ; CERDEIRA, Antonio2 ; JIMENEZ, David3 ; RASKIN, Jean-Pierre4 ; KILCHYTSKA, Valeria5 ; FLANDRE, Denis5 ; COLLAERT, Nadine6 ; INIGUEZ, Benjamin1
[1] Departament d'Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, 43007 Tarragona, Spain
[2] Departamento de Ingeniería Elèctrica, Centro de Investigación y de Estudios Avanzados del I.P.N, 07360 México, D.F., Mexico
[3] Departament d'Enginyeria Electrônica, Escola Tècnica Superior d'Enginyeria, Universitat Autònoma de Barcelona, 08193 Bellaterra, Barcelona, Spain
[4] Laboratoire d'Hyperfréquences (EMIC), Université catholique de Louvain (UCL), Place du Levant, 3, 1340, Belgium
[5] Laboratoire de Microélectronique (DICE), Université catholique de Louvain (UCL), Place du Levant, 3, 1340, Belgium
[6] IMEC, Kapeldreef 75, 3001 Leuven, Belgium - Source
Solid-state electronics. 2007, Vol 51, Num 5, pp 655-661, 7 p ; ref : 18 ref
- ISSN
- 0038-1101
- Scientific domain
- Electronics
- Publisher
- Elsevier Science, Oxford
- Publication country
- United Kingdom
- Document type
- Article
- Language
- English
- Author keyword
- Compact device modelling Double-gate MOSFET Intrinsic capacitances Parasitic capacitances
- Keyword (fr)
- Bande base Capacité parasite Capacité électrique Circuit analogique Conception compacte Courant drain Matériau dopé Modélisation Méthode analytique Régime signal faible Simulation analogique Simulation numérique Simulation électrique Technologie autoalignée Technologie silicium sur isolant Transistor MOSFET Transistor grille double
- Keyword (en)
- Base band Spurious capacity Capacitance Analog circuit Compact design Drain current Doped materials Modeling Analytical method Small signal behavior Analog simulation Numerical simulation Electrical simulation Self aligned technology Silicon on insulator technology MOSFET Dual gate transistor
- Keyword (es)
- Banda base Capacidad parásita Capacitancia Circuito analógico Concepción compacta Corriente dren Modelización Método analítico Régimen señal débil Simulación analógica Simulación numérica Simulación eléctrica Tecnología rejilla autoalineada Tecnología silicio sobre aislante Transistor de compuerta doble
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F04 Transistors
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G02 Circuit properties / 001D03G02A Electronic circuits / 001D03G02A8 Analog circuits
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 18802887
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1016/j.sse.2007.02.039 
https://dx.doi.org/10.1016/j.sse.2007.02.039
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