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Multifunction architectures for RNS processors

Author
PALIOURAS, V1 ; STOURAITIS, T1
[1] Electrical and Computer Engineering Department, University of Patras, 26 500 Patras, Greece
Source

IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1999, Vol 46, Num 8, pp 1041-1054 ; ref : 19 ref

CODEN
ICSPE5
ISSN
1057-7130
Scientific domain
Electronics
Publisher
Institute of Electrical and Electronics Engineers, New York, NY
Publication country
United States
Document type
Article
Language
English
Keyword (fr)
Architecture circuit Calcul résidu Circuit VLSI Conception circuit Méthodologie Processeur Signal numérique Simulation ordinateur Traitement signal Architecture multifonction
Keyword (en)
Circuit architecture Residue calculus VLSI circuit Circuit design Methodology Processor Digital signal Computer simulation Signal processing
Keyword (es)
Arquitectura circuito Cálculo residuo Circuito VLSI Concepción circuito Metodología Procesador Señal numérica Simulación computadora Procesamiento señal
Classification
Pascal
001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G01 Theoretical study. Circuits analysis and design

Discipline
Electronics
Origin
Inist-CNRS
Database
PASCAL
INIST identifier
1913890

Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS

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