System Architecture and Implementation of MIMO Sphere Decoders on FPGA : Configurable Computing Design-II: Hardware Level Reconfiguration
- Author
- XINMING HUANG1 ; CAO LIANG1 ; JING MA2 3
[1] Department of Electrical and Computer Engineering, Worcester Polytechnic Institute, Worcester, MA 0 1609, United States
[2] Department of Electrical Engineering, University of New Orleans, New Orleans, LA 70148, United States
[3] Math Works Inc, Natick, MA 01760, United States - Source
IEEE transactions on very large scale integration (VLSI) systems. 2008, Vol 16, Num 2, pp 188-197, 10 p ; ref : 28 ref
- ISSN
- 1063-8210
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, Piscataway, NJ
- Publication country
- United States
- Document type
- Article
- Language
- English
- Author keyword
- Field-programmable gate array (FPGA) lattice point search multiple-input-multiple-output (MIMO) detection parallel structure sphere decoding system-on-chip (SoC)
- Keyword (fr)
- Algorithme Architecture parallèle Architecture système Calculateur embarqué Circuit décodeur Circuit intégré Complexité calcul Conception conjointe Emetteur Evaluation performance Implémentation Modulation amplitude en quadrature Parallélisme Processeur signal numérique Prototype Rapport signal bruit Récepteur Réseau porte programmable Système MIMO Système multiple Système sur puce
- Keyword (en)
- Algorithm Parallel architectures System architecture Boarded computer Decoding circuit Integrated circuit Computational complexity Codesign Transmitter Performance evaluation Implementation Quadrature amplitude modulation Parallelism Digital signal processor Prototype Signal to noise ratio Receiver Field programmable gate array MIMO system Multiple system System on a chip
- Keyword (es)
- Algoritmo Arquitectura sistema Calculador embarque Circuito desciframiento Circuito integrado Complejidad computación Diseño conjunto Emisor Evaluación prestación Implementación Paralelismo Procesador señal numérica Prototipo Relación señal ruido Receptor Red puerta programable Sistema MIMO Sistema múltiple Sistema sobre pastilla
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06A Design. Technologies. Operation analysis. Testing
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06B Integrated circuits by function (including memories and processors)
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G02 Circuit properties / 001D03G02A Electronic circuits / 001D03G02A4 Signal convertors
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G02 Circuit properties / 001D03G02A Electronic circuits / 001D03G02A6 Digital circuits
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 20032912
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/TVLSI.2007.912042 
https://dx.doi.org/10.1109/TVLSI.2007.912042
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