Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process
- Author
- SOMASEKHAR, Dinesh1 ; SRINIVASAN, Balaji1 ; PANDYA, Gunjan1 ; HAMZAOGLU, Fatih1 ; KHELLAH, Muhammad1 ; KARNIK, Tanay1 ; ZHANG, Kevin1
[1] Intel Corporation, Hillsboro, OR 97124, United States - Conference title
- SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS
- Conference name
- 2009 Symposium on VLSI Circuits (Kyoto 2009-06-16)
- Author (monograph)
- MIZUNO, Masayuki (Editor)1 ; AMERASEKERA, Ajith (Editor)2
Institute of Electrical and Electronic Engineers (IEEE), Solid State Circuits Council, New York, New York, United States (Organiser of meeting)
Japan Society of Applied Physics (JSAP), Chiyoda-ku,Tokyo 102-0073, Japan (Organiser of meeting)
Institute of Electronics, Information and Communications Engineers of Japan (IEICE), Minato-ku, Tokyo 105-0011, Japan (Organiser of meeting)
[1] NEC Corporation, Kanagawa, Japan
[2] Texas Instruments Incorporated, Dallas, United States - Source
IEEE journal of solid-state circuits. 2010, Vol 45, Num 4, pp 751-758, 8 p ; ref : 10 ref
- CODEN
- IJSCBC
- ISSN
- 0018-9200
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, New York, NY
- Publication country
- United States
- Document type
- Conference Paper
- Language
- English
- Author keyword
- Charge pumps Vccmin Vmin multi-phase voltage doubler
- Keyword (fr)
- Alimentation électrique Conception compacte Condensateur Doubleur fréquence Electronique puissance Multiplicateur tension Pompage charge Seuil tension Séparation phase Temps retard
- Keyword (en)
- Power supply Compact design Capacitor Frequency doubler Power electronics Voltage multipliers Charge pumping Voltage threshold Phase separation Delay time
- Keyword (es)
- Alimentación eléctrica Concepción compacta Condensador Doblador frecuencia Electrónica potencia Bombeo carga Umbral tensión Separación fase Tiempo retardo
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03D Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F09 Dielectric, amorphous and glass solid devices
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D05 Electrical engineering. Electrical power engineering / 001D05H Power electronics, power supplies
- Discipline
- Electrical engineering. Electroenergetics Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 22729258
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/JSSC.2010.2042253 
https://dx.doi.org/10.1109/JSSC.2010.2042253
"O:13:\"PanistOpenUrl\":36:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000idc\";N;s:6:\"\u0000*\u0000fmt\";s:10:\"proceeding\";s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:9:\"\u0000*\u0000jtitle\";s:36:\"IEEE journal of solid-state circuits\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE j. solid-state circuits\";s:7:\"\u0000*\u0000date\";s:4:\"2010\";s:9:\"\u0000*\u0000volume\";s:2:\"45\";s:8:\"\u0000*\u0000issue\";s:1:\"4\";s:8:\"\u0000*\u0000spage\";s:3:\"751\";s:8:\"\u0000*\u0000epage\";s:3:\"758\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9200\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:10:\"SOMASEKHAR\";s:10:\"\u0000*\u0000aufirst\";s:6:\"Dinesh\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:6:{i:0;s:18:\"SRINIVASAN, Balaji\";i:1;s:14:\"PANDYA, Gunjan\";i:2;s:16:\"HAMZAOGLU, Fatih\";i:3;s:17:\"KHELLAH, Muhammad\";i:4;s:13:\"KARNIK, Tanay\";i:5;s:12:\"ZHANG, Kevin\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IJSCBC\";s:8:\"\u0000*\u0000genre\";s:10:\"proceeding\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:52:\"SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS\";s:8:\"\u0000*\u0000title\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Panist access
"O:12:\"IstexOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:10:\"proceeding\";s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:9:\"\u0000*\u0000jtitle\";s:36:\"IEEE journal of solid-state circuits\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE j. solid-state circuits\";s:7:\"\u0000*\u0000date\";s:4:\"2010\";s:9:\"\u0000*\u0000volume\";s:2:\"45\";s:8:\"\u0000*\u0000issue\";s:1:\"4\";s:8:\"\u0000*\u0000spage\";s:3:\"751\";s:8:\"\u0000*\u0000epage\";s:3:\"758\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9200\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:10:\"SOMASEKHAR\";s:10:\"\u0000*\u0000aufirst\";s:6:\"Dinesh\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:6:{i:0;s:18:\"SRINIVASAN, Balaji\";i:1;s:14:\"PANDYA, Gunjan\";i:2;s:16:\"HAMZAOGLU, Fatih\";i:3;s:17:\"KHELLAH, Muhammad\";i:4;s:13:\"KARNIK, Tanay\";i:5;s:12:\"ZHANG, Kevin\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IJSCBC\";s:8:\"\u0000*\u0000genre\";s:10:\"proceeding\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:52:\"SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS\";s:8:\"\u0000*\u0000title\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Istex access
"O:16:\"UnpaywallOpenUrl\":35:{s:8:\"\u0000*\u0000email\";s:27:\"assistance-portail@inist.fr\";s:6:\"\u0000*\u0000fmt\";N;s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";N;s:7:\"\u0000*\u0000pmid\";N;s:9:\"\u0000*\u0000atitle\";N;s:9:\"\u0000*\u0000jtitle\";N;s:9:\"\u0000*\u0000stitle\";N;s:7:\"\u0000*\u0000date\";N;s:9:\"\u0000*\u0000volume\";N;s:8:\"\u0000*\u0000issue\";N;s:8:\"\u0000*\u0000spage\";N;s:8:\"\u0000*\u0000epage\";N;s:8:\"\u0000*\u0000pages\";N;s:7:\"\u0000*\u0000issn\";N;s:8:\"\u0000*\u0000eissn\";N;s:9:\"\u0000*\u0000aulast\";N;s:10:\"\u0000*\u0000aufirst\";N;s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";N;s:9:\"\u0000*\u0000aucorp\";N;s:7:\"\u0000*\u0000isbn\";N;s:8:\"\u0000*\u0000coden\";N;s:8:\"\u0000*\u0000genre\";N;s:7:\"\u0000*\u0000part\";N;s:9:\"\u0000*\u0000btitle\";N;s:8:\"\u0000*\u0000title\";N;s:8:\"\u0000*\u0000place\";N;s:6:\"\u0000*\u0000pub\";N;s:10:\"\u0000*\u0000edition\";N;s:9:\"\u0000*\u0000tpages\";N;s:9:\"\u0000*\u0000series\";N;s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";N;}"
Unpaywall access
"O:16:\"EuropePMCOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:10:\"proceeding\";s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:9:\"\u0000*\u0000jtitle\";s:36:\"IEEE journal of solid-state circuits\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE j. solid-state circuits\";s:7:\"\u0000*\u0000date\";s:4:\"2010\";s:9:\"\u0000*\u0000volume\";s:2:\"45\";s:8:\"\u0000*\u0000issue\";s:1:\"4\";s:8:\"\u0000*\u0000spage\";s:3:\"751\";s:8:\"\u0000*\u0000epage\";s:3:\"758\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9200\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:10:\"SOMASEKHAR\";s:10:\"\u0000*\u0000aufirst\";s:6:\"Dinesh\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:6:{i:0;s:18:\"SRINIVASAN, Balaji\";i:1;s:14:\"PANDYA, Gunjan\";i:2;s:16:\"HAMZAOGLU, Fatih\";i:3;s:17:\"KHELLAH, Muhammad\";i:4;s:13:\"KARNIK, Tanay\";i:5;s:12:\"ZHANG, Kevin\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IJSCBC\";s:8:\"\u0000*\u0000genre\";s:10:\"proceeding\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:52:\"SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS\";s:8:\"\u0000*\u0000title\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Europe PubMed Central access
"O:11:\"BaseOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:10:\"proceeding\";s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:9:\"\u0000*\u0000jtitle\";s:36:\"IEEE journal of solid-state circuits\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE j. solid-state circuits\";s:7:\"\u0000*\u0000date\";s:4:\"2010\";s:9:\"\u0000*\u0000volume\";s:2:\"45\";s:8:\"\u0000*\u0000issue\";s:1:\"4\";s:8:\"\u0000*\u0000spage\";s:3:\"751\";s:8:\"\u0000*\u0000epage\";s:3:\"758\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9200\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:10:\"SOMASEKHAR\";s:10:\"\u0000*\u0000aufirst\";s:6:\"Dinesh\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:6:{i:0;s:18:\"SRINIVASAN, Balaji\";i:1;s:14:\"PANDYA, Gunjan\";i:2;s:16:\"HAMZAOGLU, Fatih\";i:3;s:17:\"KHELLAH, Muhammad\";i:4;s:13:\"KARNIK, Tanay\";i:5;s:12:\"ZHANG, Kevin\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IJSCBC\";s:8:\"\u0000*\u0000genre\";s:10:\"proceeding\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:52:\"SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS\";s:8:\"\u0000*\u0000title\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Base Search access
"O:12:\"ArXivOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:10:\"proceeding\";s:6:\"\u0000*\u0000doi\";s:25:\"10.1109\/JSSC.2010.2042253\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:9:\"\u0000*\u0000jtitle\";s:36:\"IEEE journal of solid-state circuits\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE j. solid-state circuits\";s:7:\"\u0000*\u0000date\";s:4:\"2010\";s:9:\"\u0000*\u0000volume\";s:2:\"45\";s:8:\"\u0000*\u0000issue\";s:1:\"4\";s:8:\"\u0000*\u0000spage\";s:3:\"751\";s:8:\"\u0000*\u0000epage\";s:3:\"758\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9200\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:10:\"SOMASEKHAR\";s:10:\"\u0000*\u0000aufirst\";s:6:\"Dinesh\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:6:{i:0;s:18:\"SRINIVASAN, Balaji\";i:1;s:14:\"PANDYA, Gunjan\";i:2;s:16:\"HAMZAOGLU, Fatih\";i:3;s:17:\"KHELLAH, Muhammad\";i:4;s:13:\"KARNIK, Tanay\";i:5;s:12:\"ZHANG, Kevin\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IJSCBC\";s:8:\"\u0000*\u0000genre\";s:10:\"proceeding\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:52:\"SPECIAL ISSUE ON THE 2009 SYMPOSIUM ON VLSI CIRCUITS\";s:8:\"\u0000*\u0000title\";s:68:\"Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"8\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
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