Influence of Bosch Etch Process on Electrical Isolation of TSV Structures
- Author
- RANGANATHAN, Nagarajan1 ; DA YONG LEE1 ; YOUHE, Liu1 ; LO, Guo-Qiang1 ; PRASAD, Krishnamachar2 ; LEONG PEY, Kin3
[1] Institute of Microelectronics, Agency for Science, Technology and Research, Singapore 117685, Singapore
[2] Department of Electrical & Electronic Engineering, Auckland University of Technology, Auckland 1142, New Zealand
[3] Division of Microelectronics, School of Electrical & Electronic Engineedng, Nanyang Technological University, Singapore 639798, Singapore - Source
IEEE transactions on components, packaging, and manufacturing technology (2011. Print). 2011, Vol 1, Num 9-10, pp 1497-1507, 11 p ; ref : 48 ref
- ISSN
- 2156-3950
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, Piscataway, NJ
- Publication country
- United States
- Document type
- Article
- Language
- English
- Author keyword
- 3-D integrated circuit bosch etch process deep reactive ion etching finite element leakage current through silicon vias
- Keyword (fr)
- Barrière diffusion Caractéristique électrique Circuit intégré Concentration contrainte Contrainte thermomécanique Couche barrière Courant fuite Cuivre Défaillance Empilement Fabrication microélectronique Gravure ionique réactive Interconnexion Méthode numérique Méthode élément fini Packaging électronique Rugosité Silicium Structure 3 dimensions Tantale Trou interconnexion Vitesse gravure
- Keyword (en)
- Diffusion barrier Electrical characteristic Integrated circuit Stress concentration Thermomechanical stress Barrier layer Leakage current Copper Failures Stacking Microelectronic fabrication Reactive ion etching Interconnection Numerical method Finite element method Electronic packaging Roughness Silicon Three dimensional structure Tantalum Via hole Etching rate
- Keyword (es)
- Barrera difusión Característica eléctrica Circuito integrado Concentración restringida Tensión termomecánica Corriente escape Cobre Fallo Apilamiento Fabricación microeléctrica Grabado iónico reactivo Interconexión Método numérico Método elemento finito Packaging electrónico Rugosidad Silicio Estructura 3 dimensiones Tantalio Agujero interconexión Velocidad grabado
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06A Design. Technologies. Operation analysis. Testing
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F17 Microelectronic fabrication (materials and surfaces technology)
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 24758510
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/TCPMT.2011.2160395 
https://dx.doi.org/10.1109/TCPMT.2011.2160395
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