Low-power adaptive filter architectures and their application to 51.84 Mb/s ATM-LAN
- Author
- SHANBHAG, N. R1 ; GOEL, M1
[1] Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, Urbana, IL 61801, United States - Source
IEEE transactions on signal processing. 1997, Vol 45, Num 5, pp 1276-1290 ; ref : 46 ref
- CODEN
- ITPRED
- ISSN
- 1053-587X
- Scientific domain
- Telecommunications
- Publisher
- Institute of Electrical and Electronics Engineers, New York, NY
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Algorithme Analyse performance Architecture circuit Circuit VLSI Filtre adaptatif Puissance faible Récepteur Réseau local Traitement signal Mode transfert asynchrone
- Keyword (en)
- Algorithm Performance analysis Circuit architecture VLSI circuit Adaptive filter Low power Receiver Local network Signal processing Asynchronous transfer mode
- Keyword (es)
- Algoritmo Análisis eficacia Arquitectura circuito Circuito VLSI Filtro adaptable Potencia débil Receptor Red local Procesamiento señal
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06B Integrated circuits by function (including memories and processors)
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 2691927
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/78.575700 
https://dx.doi.org/10.1109/78.575700
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