Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation
- Author
- KASHIWAGI, Junichi1 ; FUJIWARA, Tetsuya1 ; AKUTSU, Minoru1 ; ITO, Norikazu1 ; CHIKAMATSU, Kentaro1 ; NAKAHARA, Ken1
[1] Power Electronics R&D Unit, Research and Development Headquarters, ROHM Co., Ltd., Kyoto 615-8585, Japan - Source
IEEE electron device letters. 2013, Vol 34, Num 9, pp 1109-1111, 3 p ; ref : 14 ref
- CODEN
- EDLEDZ
- ISSN
- 0741-3106
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, New York, NY
- Publication country
- United States
- Document type
- Article
- Language
- English
- Author keyword
- 10-MHz switching operation Al2O3 atomic layer deposition (ALD) double-insulator gate enhancement-mode (E-mode)
- Keyword (fr)
- Alumine Commutation Composé binaire Courant drain Diélectrique Gravure Grille transistor Mode enrichissement Méthode couche atomique Nitrure d'aluminium Nitrure de gallium Oxyde grille Seuil tension Technologie MOS Temps retard Transconductance Transistor MOSFET Al2O3 AlN GaN Composé III-V Composé III-VI
- Keyword (en)
- Alumina Switching Binary compound Drain current Dielectric materials Engraving Transistor gate Enhancement mode Atomic layer method Aluminium nitride Gallium nitride Gate oxide Voltage threshold MOS technology Delay time Transconductance MOSFET III-V compound III-VI compound
- Keyword (es)
- Alúmina Conmutación Compuesto binario Corriente dren Dieléctrico Grabado Rejilla transistor Modo enriquecimiento Método capa atómica Aluminio nitruro Galio nitruro Oxido rejilla Umbral tensión Tecnología MOS Tiempo retardo Transconductancia Compuesto III-V Compuesto III-VI
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F04 Transistors
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 27734975
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Access to the document
Install on your browser
DOI
10.1109/LED.2013.2272491 
https://dx.doi.org/10.1109/LED.2013.2272491
"O:13:\"PanistOpenUrl\":36:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000idc\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:9:\"\u0000*\u0000jtitle\";s:28:\"IEEE electron device letters\";s:9:\"\u0000*\u0000stitle\";s:25:\"IEEE electron device lett\";s:7:\"\u0000*\u0000date\";s:4:\"2013\";s:9:\"\u0000*\u0000volume\";s:2:\"34\";s:8:\"\u0000*\u0000issue\";s:1:\"9\";s:8:\"\u0000*\u0000spage\";s:4:\"1109\";s:8:\"\u0000*\u0000epage\";s:4:\"1111\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0741-3106\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:9:\"KASHIWAGI\";s:10:\"\u0000*\u0000aufirst\";s:7:\"Junichi\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:5:{i:0;s:17:\"FUJIWARA, Tetsuya\";i:1;s:14:\"AKUTSU, Minoru\";i:2;s:13:\"ITO, Norikazu\";i:3;s:19:\"CHIKAMATSU, Kentaro\";i:4;s:13:\"NAKAHARA, Ken\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"EDLEDZ\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"3\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Panist access
"O:12:\"IstexOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:9:\"\u0000*\u0000jtitle\";s:28:\"IEEE electron device letters\";s:9:\"\u0000*\u0000stitle\";s:25:\"IEEE electron device lett\";s:7:\"\u0000*\u0000date\";s:4:\"2013\";s:9:\"\u0000*\u0000volume\";s:2:\"34\";s:8:\"\u0000*\u0000issue\";s:1:\"9\";s:8:\"\u0000*\u0000spage\";s:4:\"1109\";s:8:\"\u0000*\u0000epage\";s:4:\"1111\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0741-3106\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:9:\"KASHIWAGI\";s:10:\"\u0000*\u0000aufirst\";s:7:\"Junichi\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:5:{i:0;s:17:\"FUJIWARA, Tetsuya\";i:1;s:14:\"AKUTSU, Minoru\";i:2;s:13:\"ITO, Norikazu\";i:3;s:19:\"CHIKAMATSU, Kentaro\";i:4;s:13:\"NAKAHARA, Ken\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"EDLEDZ\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"3\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Istex access
"O:16:\"UnpaywallOpenUrl\":35:{s:8:\"\u0000*\u0000email\";s:27:\"assistance-portail@inist.fr\";s:6:\"\u0000*\u0000fmt\";N;s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";N;s:7:\"\u0000*\u0000pmid\";N;s:9:\"\u0000*\u0000atitle\";N;s:9:\"\u0000*\u0000jtitle\";N;s:9:\"\u0000*\u0000stitle\";N;s:7:\"\u0000*\u0000date\";N;s:9:\"\u0000*\u0000volume\";N;s:8:\"\u0000*\u0000issue\";N;s:8:\"\u0000*\u0000spage\";N;s:8:\"\u0000*\u0000epage\";N;s:8:\"\u0000*\u0000pages\";N;s:7:\"\u0000*\u0000issn\";N;s:8:\"\u0000*\u0000eissn\";N;s:9:\"\u0000*\u0000aulast\";N;s:10:\"\u0000*\u0000aufirst\";N;s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";N;s:9:\"\u0000*\u0000aucorp\";N;s:7:\"\u0000*\u0000isbn\";N;s:8:\"\u0000*\u0000coden\";N;s:8:\"\u0000*\u0000genre\";N;s:7:\"\u0000*\u0000part\";N;s:9:\"\u0000*\u0000btitle\";N;s:8:\"\u0000*\u0000title\";N;s:8:\"\u0000*\u0000place\";N;s:6:\"\u0000*\u0000pub\";N;s:10:\"\u0000*\u0000edition\";N;s:9:\"\u0000*\u0000tpages\";N;s:9:\"\u0000*\u0000series\";N;s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";N;}"
Unpaywall access
"O:16:\"EuropePMCOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:9:\"\u0000*\u0000jtitle\";s:28:\"IEEE electron device letters\";s:9:\"\u0000*\u0000stitle\";s:25:\"IEEE electron device lett\";s:7:\"\u0000*\u0000date\";s:4:\"2013\";s:9:\"\u0000*\u0000volume\";s:2:\"34\";s:8:\"\u0000*\u0000issue\";s:1:\"9\";s:8:\"\u0000*\u0000spage\";s:4:\"1109\";s:8:\"\u0000*\u0000epage\";s:4:\"1111\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0741-3106\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:9:\"KASHIWAGI\";s:10:\"\u0000*\u0000aufirst\";s:7:\"Junichi\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:5:{i:0;s:17:\"FUJIWARA, Tetsuya\";i:1;s:14:\"AKUTSU, Minoru\";i:2;s:13:\"ITO, Norikazu\";i:3;s:19:\"CHIKAMATSU, Kentaro\";i:4;s:13:\"NAKAHARA, Ken\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"EDLEDZ\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"3\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Europe PubMed Central access
"O:11:\"BaseOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:9:\"\u0000*\u0000jtitle\";s:28:\"IEEE electron device letters\";s:9:\"\u0000*\u0000stitle\";s:25:\"IEEE electron device lett\";s:7:\"\u0000*\u0000date\";s:4:\"2013\";s:9:\"\u0000*\u0000volume\";s:2:\"34\";s:8:\"\u0000*\u0000issue\";s:1:\"9\";s:8:\"\u0000*\u0000spage\";s:4:\"1109\";s:8:\"\u0000*\u0000epage\";s:4:\"1111\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0741-3106\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:9:\"KASHIWAGI\";s:10:\"\u0000*\u0000aufirst\";s:7:\"Junichi\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:5:{i:0;s:17:\"FUJIWARA, Tetsuya\";i:1;s:14:\"AKUTSU, Minoru\";i:2;s:13:\"ITO, Norikazu\";i:3;s:19:\"CHIKAMATSU, Kentaro\";i:4;s:13:\"NAKAHARA, Ken\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"EDLEDZ\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"3\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Base Search access
"O:12:\"ArXivOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:24:\"10.1109\/LED.2013.2272491\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:9:\"\u0000*\u0000jtitle\";s:28:\"IEEE electron device letters\";s:9:\"\u0000*\u0000stitle\";s:25:\"IEEE electron device lett\";s:7:\"\u0000*\u0000date\";s:4:\"2013\";s:9:\"\u0000*\u0000volume\";s:2:\"34\";s:8:\"\u0000*\u0000issue\";s:1:\"9\";s:8:\"\u0000*\u0000spage\";s:4:\"1109\";s:8:\"\u0000*\u0000epage\";s:4:\"1111\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0741-3106\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:9:\"KASHIWAGI\";s:10:\"\u0000*\u0000aufirst\";s:7:\"Junichi\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:5:{i:0;s:17:\"FUJIWARA, Tetsuya\";i:1;s:14:\"AKUTSU, Minoru\";i:2;s:13:\"ITO, Norikazu\";i:3;s:19:\"CHIKAMATSU, Kentaro\";i:4;s:13:\"NAKAHARA, Ken\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"EDLEDZ\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:108:\"Recessed-Gate Enhancement-Mode GaN MOSFETs With a Double-Insulator Gate Providing 10-MHz Switching Operation\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:1:\"3\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
arXiv access
