Synthesis of two-phase quasi-delay-insensitive circuits from dependency graphs
- Author
- KAGOTANI, H; NANYA, T
Tokyo inst. technology, fac. eng., Tokyo 152, Japan - Source
Systems and computers in Japan. 1995, Vol 26, Num 4, pp 11-19 ; ref : 15 ref
- CODEN
- SCJAEP
- ISSN
- 0882-1666
- Scientific domain
- Computer science
- Publisher
- Scripta Technica, New York, NY
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Circuit asynchrone Conception circuit Dépendance Synthèse circuit Graphe dépendance Quasi-delay-insensitive circuit
- Keyword (en)
- Asynchronous circuit Circuit design Dependence Circuit synthesis Dependence graphe
- Keyword (es)
- Circuito asincrono Concepción circuito Dependencia Síntesis circuito
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D02 Computer science; control theory; systems / 001D02A Theoretical computing / 001D02A06 Information retrieval. Graph
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G01 Theoretical study. Circuits analysis and design
- Discipline
- Computer science : theoretical automation and systems Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 3593065
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1002/scj.4690260402 
https://dx.doi.org/10.1002/scj.4690260402
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