An analog neural network processor with programmable topology
- Author
- BOSER, B. E; SÄCKINGER, E; BROMLEY, J; LE CUN, Y; JACKEL, L. D
AT&T Bell Laboratories, Holmdel NJ 07733, United States - Source
IEEE journal of solid-state circuits. 1991, Vol 26, Num 12, pp 2017-2025 ; ref : 19 ref
- CODEN
- IJSCBC
- ISSN
- 0018-9200
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, New York, NY
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Circuit intégré Conception circuit Etude théorique Implémentation Performance Processeur Réseau neuronal
- Keyword (en)
- Integrated circuit Circuit design Theoretical study Implementation Performance Processor Neural network
- Keyword (es)
- Circuito integrado Concepción circuito Estudio teórico Ejecución Rendimiento Procesador Red neuronal
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G03 Neural networks
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 5093469
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1109/4.104196 
https://dx.doi.org/10.1109/4.104196
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