A random, distributed algorithm to embed trees in partially faulty processor arrays
- Author
- SITARAM, D; KOREN, I; KRISHNA, C. M
Univ. Massachusetts, dep. electrical computer eng., Amherst MA 01003, United States - Source
Journal of parallel and distributed computing (Print). 1991, Vol 12, Num 1, pp 1-11 ; ref : 14 ref
- ISSN
- 0743-7315
- Scientific domain
- Computer science; Mathematics
- Publisher
- Elsevier, San Diego, CA
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Algorithme réparti Arbre binaire Architecture système Processeur tableau Réseau interconnecté Tolérance faute
- Keyword (en)
- Distributed algorithm Binary tree System architecture Array processor Interconnected power system Fault tolerance
- Keyword (es)
- Arbol binario Arquitectura sistema Procesador panel Red interconectada Tolerancia falta
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D02 Computer science; control theory; systems / 001D02A Theoretical computing
- Discipline
- Computer science : theoretical automation and systems
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 5389176
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1016/0743-7315(91)90024-4 
https://dx.doi.org/10.1016/0743-7315(91)90024-4
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