New parallel multiplier design
- Author
- MEKHALLALATI, M. C; IBRAHIM, M. K
Univ. Nottingham, dep. electrical electronic eng., Nottingham Notts. NG7 2RD, United Kingdom - Source
Electronics Letters. 1992, Vol 28, Num 17, pp 1650-1651 ; ref : 4 ref
- CODEN
- ELLEAK
- ISSN
- 0013-5194
- Scientific domain
- Electronics; Optics; Telecommunications
- Publisher
- Institution of Electrical Engineers, London
- Publication country
- United Kingdom
- Document type
- Article
- Language
- English
- Keyword (fr)
- Additionneur Circuit arithmétique Circuit numérique Conception circuit Implantation(topométrie) Multiplicateur Ordinateur Performance Traitement parallèle
- Keyword (en)
- Adder Arithmetic circuit Digital circuit Circuit design Layout Multiplier Computer Performance Parallel processing
- Keyword (es)
- Adicionador Circuito aritmético Circuito numérico Concepción circuito Implantación(topometría) Multiplicador Computadora Rendimiento Tratamiento paralelo
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03G Electric, optical and optoelectronic circuits / 001D03G02 Circuit properties / 001D03G02A Electronic circuits / 001D03G02A6 Digital circuits
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 5480260
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1049/el:19921050 
https://dx.doi.org/10.1049/el:19921050
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