A systolic array exploiting the inherent parallelisms of artificial neural networks
- Author
- JAI-HOON CHUNG; HYUNSOO YOON; SEUNG RYOUL MAENG
Korea advanced inst. sci. technology, dep. computer sci., Taejon 305-701, Korea, Republic of - Source
Microprocessing and microprogramming. 1991, Vol 33, Num 3, pp 145-159 ; ref : 25 ref
- CODEN
- MMICDT
- ISSN
- 0165-6074
- Scientific domain
- Computer science
- Publisher
- North-Holland, Amsterdam
- Publication country
- Netherlands
- Document type
- Article
- Language
- English
- Keyword (fr)
- Circuit VLSI Evaluation performance Implémentation Intelligence artificielle Réseau neuronal Réseau pipeline Réseau systolique Propagation arrière
- Keyword (en)
- VLSI circuit Performance evaluation Implementation Artificial intelligence Neural network Pipeline network Systolic network
- Keyword (es)
- Circuito VLSI Evaluación prestación Ejecución Inteligencia artificial Red neuronal Red oleoductos Red sistólica
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D02 Computer science; control theory; systems / 001D02C Artificial intelligence / 001D02C06 Connectionism. Neural networks
- Discipline
- Computer science : theoretical automation and systems
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 5569526
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1016/0165-6074(92)90017-2 
https://dx.doi.org/10.1016/0165-6074(92)90017-2
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