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Advanced VLSI validated input security device employing data and hardware validation features

Author
ILIEV, V1 ; DLAY, S. S; MCLAUCHLAN, M. R; KOELMANS, A. M; KINNIMENT, D. J
[1] Univ. Newcastle upon Tyne, dep. electrical electronic eng., Newcastle upon Tyne NE1 7RU, United Kingdom
Source

IEE proceedings. Part E. Computers and digital techniques. 1989, Vol 136, Num 6, pp 471-477 ; ref : 10 ref

CODEN
IPETD3
ISSN
0143-7062
Scientific domain
Electronics
Publisher
Institution of Electrical Engineers, Stevenage
Publication country
United Kingdom
Document type
Article
Language
English
Keyword (fr)
Circuit VLSI Circuit intégré Codage Cryptographie Décodage Implémentation Parité Simulation Technologie MOS complémentaire
Keyword (en)
VLSI circuit Integrated circuit Coding Cryptography Decoding Implementation Parity Simulation Complementary MOS technology
Keyword (es)
Circuito VLSI Circuito integrado Codificación Criptografía Desciframiento Ejecución Paridad Simulación Tecnología MOS complementario
Classification
Pascal
001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F06 Integrated circuits / 001D03F06B Integrated circuits by function (including memories and processors)

Discipline
Electronics
Origin
Inist-CNRS
Database
PASCAL
INIST identifier
6650085

Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS

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