Treshold voltage models of the narrow-gate effect in micron and submicron MOSFETs
- Author
- SHAO-SHIUN CHUNG, S1 ; CHIH-TANG SAH
[1] Univ. Illinois Urbana-Champaign, dep. electrical computer eng., Urbana IL 61801, United States - Source
Solid-state electronics. 1988, Vol 31, Num 6, pp 1009-1021 ; ref : 25 ref
- ISSN
- 0038-1101
- Scientific domain
- Electronics
- Publisher
- Elsevier Science, Oxford
- Publication country
- United Kingdom
- Document type
- Article
- Language
- English
- Keyword (fr)
- Analyse numérique Canal transistor Equation Poisson Grille transistor Modélisation Seuil tension Transistor MOS Transistor effet champ
- Keyword (en)
- Numerical analysis Transistor channel Poisson equation Transistor gate Modeling Voltage threshold MOS transistor Field effect transistor
- Keyword (es)
- Análisis numérico Canal transistor Ecuación Poisson Rejilla transistor Modelización Umbral tensión Transistor MOS Transistor efecto campo
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F04 Transistors
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 7061408
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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DOI
10.1016/0038-1101(88)90400-5 
https://dx.doi.org/10.1016/0038-1101(88)90400-5
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