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Digital simulation of three phase saturistor circuit configurations

Author
REVANKAR, G. N1 ; BHAGWAT, R. T
[1] IIT, Bombay, India
Source

Journal of the Institution of Engineers. India. Electrical Engineering Division. 1984, Vol 64, Num 5, pp 256-263 ; ref : 12 ref

CODEN
JEELAC
ISSN
0020-3386
Scientific domain
Electrical engineering; Civil engineering
Publisher
Institution of Engineers, Calcutta
Publication country
India
Document type
Article
Language
English
Keyword (fr)
Analyse fonctionnement Circuit non linéaire Circuit triphasé Circuit électrique Inductance non linéaire Inductance saturable Modélisation Simulation numérique
Keyword (en)
Operation study Non linear circuit Three phase circuit Electric circuit Non linear reactor Saturable inductance Modeling Digital simulation
Keyword (es)
Análisis funcionamiento Circuito no lineal Circuito trifase Circuito eléctrico Inductancia no lineal Inductancia saturable Modelaje Simulación numérica
Classification
Pascal
001 Exact sciences and technology / 001D Applied sciences / 001D05 Electrical engineering. Electrical power engineering / 001D05E Transformers and inductors

Discipline
Electrical engineering. Electroenergetics
Origin
Inist-CNRS
Database
PASCAL
INIST identifier
7859414

Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS

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