Channel ion implantation for small-geometry high-performance CMOS-SOS circuits
- Author
- LEWIS, A. G; BRASSINGTON, M. P; PARTRIDGE, S. L
GEC hirst res. cent - Source
I.E.E.E. transactions on electron devices. 1986, Vol 33, Num 3, pp 335-344 ; ref : 14 ref
- CODEN
- IETDAI
- ISSN
- 0018-9383
- Scientific domain
- Electronics
- Publisher
- Institute of Electrical and Electronics Engineers, New York, NY
- Publication country
- United States
- Document type
- Article
- Language
- English
- Keyword (fr)
- Bore Canal transistor Caractéristique fonctionnement Fabrication microélectronique Haute performance Implantation ion Miniaturisation Optimisation Profil dopage Technologie MOS complémentaire Technologie NMOS Technologie PMOS Technologie silicium sur saphir Transistor MOS Transistor effet champ
- Keyword (en)
- Boron Transistor channel Performance characteristic Microelectronic fabrication High performance Ion implantation Miniaturization Optimization Doping profile Complementary MOS technology NMOS technology Silicon on sapphire technology MOS transistor Field effect transistor
- Keyword (es)
- Optimizacion
- Classification
- Pascal
- 001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics / 001D03F Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices / 001D03F17 Microelectronic fabrication (materials and surfaces technology)
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- 8571256
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Access to the document
Install on your browser
DOI
10.1109/T-ED.1986.22492 
https://dx.doi.org/10.1109/T-ED.1986.22492
"O:13:\"PanistOpenUrl\":36:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000idc\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:23:\"10.1109\/T-ED.1986.22492\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:9:\"\u0000*\u0000jtitle\";s:41:\"I.E.E.E. transactions on electron devices\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE trans. electron devices\";s:7:\"\u0000*\u0000date\";s:4:\"1986\";s:9:\"\u0000*\u0000volume\";s:2:\"33\";s:8:\"\u0000*\u0000issue\";s:1:\"3\";s:8:\"\u0000*\u0000spage\";s:3:\"335\";s:8:\"\u0000*\u0000epage\";s:3:\"344\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9383\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:5:\"LEWIS\";s:10:\"\u0000*\u0000aufirst\";s:4:\"A. G\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:17:\"BRASSINGTON, M. P\";i:1;s:15:\"PARTRIDGE, S. L\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IETDAI\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Panist access
"O:12:\"IstexOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:23:\"10.1109\/T-ED.1986.22492\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:9:\"\u0000*\u0000jtitle\";s:41:\"I.E.E.E. transactions on electron devices\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE trans. electron devices\";s:7:\"\u0000*\u0000date\";s:4:\"1986\";s:9:\"\u0000*\u0000volume\";s:2:\"33\";s:8:\"\u0000*\u0000issue\";s:1:\"3\";s:8:\"\u0000*\u0000spage\";s:3:\"335\";s:8:\"\u0000*\u0000epage\";s:3:\"344\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9383\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:5:\"LEWIS\";s:10:\"\u0000*\u0000aufirst\";s:4:\"A. G\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:17:\"BRASSINGTON, M. P\";i:1;s:15:\"PARTRIDGE, S. L\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IETDAI\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Istex access
"O:16:\"UnpaywallOpenUrl\":35:{s:8:\"\u0000*\u0000email\";s:27:\"assistance-portail@inist.fr\";s:6:\"\u0000*\u0000fmt\";N;s:6:\"\u0000*\u0000doi\";s:23:\"10.1109\/T-ED.1986.22492\";s:6:\"\u0000*\u0000pii\";N;s:7:\"\u0000*\u0000pmid\";N;s:9:\"\u0000*\u0000atitle\";N;s:9:\"\u0000*\u0000jtitle\";N;s:9:\"\u0000*\u0000stitle\";N;s:7:\"\u0000*\u0000date\";N;s:9:\"\u0000*\u0000volume\";N;s:8:\"\u0000*\u0000issue\";N;s:8:\"\u0000*\u0000spage\";N;s:8:\"\u0000*\u0000epage\";N;s:8:\"\u0000*\u0000pages\";N;s:7:\"\u0000*\u0000issn\";N;s:8:\"\u0000*\u0000eissn\";N;s:9:\"\u0000*\u0000aulast\";N;s:10:\"\u0000*\u0000aufirst\";N;s:9:\"\u0000*\u0000auinit\";N;s:10:\"\u0000*\u0000auinitm\";N;s:5:\"\u0000*\u0000au\";N;s:9:\"\u0000*\u0000aucorp\";N;s:7:\"\u0000*\u0000isbn\";N;s:8:\"\u0000*\u0000coden\";N;s:8:\"\u0000*\u0000genre\";N;s:7:\"\u0000*\u0000part\";N;s:9:\"\u0000*\u0000btitle\";N;s:8:\"\u0000*\u0000title\";N;s:8:\"\u0000*\u0000place\";N;s:6:\"\u0000*\u0000pub\";N;s:10:\"\u0000*\u0000edition\";N;s:9:\"\u0000*\u0000tpages\";N;s:9:\"\u0000*\u0000series\";N;s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";N;}"
Unpaywall access
"O:16:\"EuropePMCOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:23:\"10.1109\/T-ED.1986.22492\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:9:\"\u0000*\u0000jtitle\";s:41:\"I.E.E.E. transactions on electron devices\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE trans. electron devices\";s:7:\"\u0000*\u0000date\";s:4:\"1986\";s:9:\"\u0000*\u0000volume\";s:2:\"33\";s:8:\"\u0000*\u0000issue\";s:1:\"3\";s:8:\"\u0000*\u0000spage\";s:3:\"335\";s:8:\"\u0000*\u0000epage\";s:3:\"344\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9383\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:5:\"LEWIS\";s:10:\"\u0000*\u0000aufirst\";s:4:\"A. G\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:17:\"BRASSINGTON, M. P\";i:1;s:15:\"PARTRIDGE, S. L\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IETDAI\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
Europe PubMed Central access
"O:12:\"ArXivOpenUrl\":35:{s:10:\"\u0000*\u0000openUrl\";N;s:6:\"\u0000*\u0000fmt\";s:7:\"journal\";s:6:\"\u0000*\u0000doi\";s:23:\"10.1109\/T-ED.1986.22492\";s:6:\"\u0000*\u0000pii\";s:0:\"\";s:7:\"\u0000*\u0000pmid\";s:0:\"\";s:9:\"\u0000*\u0000atitle\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:9:\"\u0000*\u0000jtitle\";s:41:\"I.E.E.E. transactions on electron devices\";s:9:\"\u0000*\u0000stitle\";s:28:\"IEEE trans. electron devices\";s:7:\"\u0000*\u0000date\";s:4:\"1986\";s:9:\"\u0000*\u0000volume\";s:2:\"33\";s:8:\"\u0000*\u0000issue\";s:1:\"3\";s:8:\"\u0000*\u0000spage\";s:3:\"335\";s:8:\"\u0000*\u0000epage\";s:3:\"344\";s:8:\"\u0000*\u0000pages\";s:0:\"\";s:7:\"\u0000*\u0000issn\";s:9:\"0018-9383\";s:8:\"\u0000*\u0000eissn\";s:0:\"\";s:9:\"\u0000*\u0000aulast\";s:5:\"LEWIS\";s:10:\"\u0000*\u0000aufirst\";s:4:\"A. G\";s:9:\"\u0000*\u0000auinit\";s:0:\"\";s:10:\"\u0000*\u0000auinitm\";s:0:\"\";s:5:\"\u0000*\u0000au\";a:2:{i:0;s:17:\"BRASSINGTON, M. P\";i:1;s:15:\"PARTRIDGE, S. L\";}s:9:\"\u0000*\u0000aucorp\";s:0:\"\";s:7:\"\u0000*\u0000isbn\";s:0:\"\";s:8:\"\u0000*\u0000coden\";s:6:\"IETDAI\";s:8:\"\u0000*\u0000genre\";s:7:\"article\";s:7:\"\u0000*\u0000part\";s:0:\"\";s:9:\"\u0000*\u0000btitle\";s:0:\"\";s:8:\"\u0000*\u0000title\";s:78:\"Channel ion implantation for small-geometry high-performance CMOS-SOS circuits\";s:8:\"\u0000*\u0000place\";s:12:\"New York, NY\";s:6:\"\u0000*\u0000pub\";s:49:\"Institute of Electrical and Electronics Engineers\";s:10:\"\u0000*\u0000edition\";s:0:\"\";s:9:\"\u0000*\u0000tpages\";s:0:\"\";s:9:\"\u0000*\u0000series\";s:0:\"\";s:8:\"\u0000*\u0000proxy\";s:30:\"http:\/\/proxyout.inist.fr:8080\/\";s:12:\"\u0000*\u0000integrite\";b:1;}"
arXiv access
