A NEW ISOLATION TECHNIQUE FOR SOS/LSI'S-LOCAL BURIED OXIDE ISOLATION OF SOS (LOBOS).
- Author
- SAKAI Y; HORI R; DOTA K; KUBO M
HITACHI LTD., KOKUBUNJI, TOKYO, JAP. - Source
- JAP. J. APPL. PHYS.; JAP.; DA. 1977; VOL. 16; SUPPL. 1; PP. 551-555; BIBL. 2 REF.; (CONF. SOLID STATE DEVICES. 8. PROC.; TOKYO; 1976)
- Document type
- Conference Paper
- Language
- English
- Keyword (fr)
- FABRICATION MICROELECTRONIQUE TECHNOLOGIE SUBSTRAT SILICIUM SUR SAPHIR TECHNOLOGIE ISOLATION OXYDE ELECTRONIQUE
- Keyword (en)
- MICROELECTRONIC FABRICATION TECHNOLOGY SILICON ON SAPPHIRE SUBSTRATE ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL7830095756
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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