THE PLANAR JUNCTION ETCH FOR HIGH VOLTAGE AND LOW SURFACE FIELDS IN PLANAR DEVICES.
- Author
- TEMPLE VAK; BALIGA BJ; ADLER MS
GENERAL ELECTRIC CO., SCHENECTADY, N.Y. 12301 - Source
- I.E.E.E. TRANS. ELECTRON DEVICES; U.S.A.; DA. 1977; VOL. 24; NO 11; PP. 1304-1310; BIBL. 15 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- DISPOSITIF ETAT SOLIDE DISPOSITIF PLANAR GRAVURE HAUTE TENSION JONCTION P N DISRUPTION ELECTRIQUE CHAMP ELECTRIQUE CHAMP FAIBLE SURFACE FABRICATION ELECTRONIQUE
- Keyword (en)
- SOLID STATE DEVICE HIGH VOLTAGE P N JUNCTION ELECTRIC BREAKDOWN ELECTRICAL FIELD LOW FIELD SURFACE ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL7830327431
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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