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LOGICAL NETWORKS OF JK-JK EDGE-TRIGGERED FLIP-FLOPS. TTL AND CMOS STRUCTURES.

Author
ION S
Source
REV. ROUMAINE PHYS.; ROUMAN.; DA. 1977; VOL. 22; NO 8; PP. 847-857; ABS. FR.; BIBL. 9 REF.
Document type
Article
Language
English
Keyword (fr)
CIRCUIT LOGIQUE TECHNOLOGIE MOS COMPLEMENTAIRE LOGIQUE TRANSISTOR TRANSISTOR BASCULE JK ELECTRONIQUE
Keyword (en)
LOGIC CIRCUIT COMPLEMENTARY MOS TECHNOLOGY TRANSISTOR TRANSISTOR LOGIC JK BISTABLE ELECTRONICS
Keyword (es)
ELECTRONICA
Classification
Pascal
001 Exact sciences and technology / 001D Applied sciences / 001D03 Electronics

Discipline
Electronics
Origin
Inist-CNRS
Database
PASCAL
INIST identifier
PASCAL7830350087

Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS

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