ROOM TEMPERATURE INSTABILITIES OF P-CHANNEL SILICON GATE MOS TRANSISTORS
- Author
- NAKAYAMA H; OSADA Y; SHINDO M
MITSUBISHI ELECTRIC CORP., 4-1 MIZUHARA ITAMI HYOGO, JPN - Source
- J. ELECTROCHEM. SOC.; USA; DA. 1978; VOL. 125; NO 8; PP. 1302-1306; BIBL. 7 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- TRANSISTOR EFFET CHAMP TRANSISTOR MOS INSTABILITE TEMPERATURE AMBIANTE ELECTRODE SILICIUM CONDUCTIVITE TYPE P ELECTRONIQUE
- Keyword (en)
- FIELD EFFECT TRANSISTOR MOS TRANSISTOR INSTABILITY ROOM TEMPERATURE ELECTRODES SILICON P TYPE CONDUCTIVITY ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL7930105070
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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