1 MU M MOSFET VLSI TECHNOLOGY. IV: HOT-ELECTRON DESIGN CONSTRAINTS
- Author
- NING TH; COOK PW; DENNARD RH
IBM THOMAS J. WATSON RES. CENT.,YORKTOWN HEIGHTS NY,USA - Source
- I.E.E.E. TRANS. ELECTRON DEVICES; USA; DA. 1979; VOL. 26; NO 4; PP. 346-353; BIBL. 31 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- CIRCUIT INTEGRE CIRCUIT VLSI TRANSISTOR EFFET CHAMP TRANSISTOR MOS ELECTRON CHAUD CONCEPTION CIRCUIT LIMITE STABILITE ELECTRONIQUE
- Keyword (en)
- INTEGRATED CIRCUIT VLSI CIRCUIT FIELD EFFECT TRANSISTOR MOS TRANSISTOR HOT ELECTRON CIRCUIT DESIGN STABILITY BOUNDARY ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL8030149421
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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Istex access
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