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A NEW FAULT DETECTING SCHEME FOR COMBINATIONAL LOGIC CIRCUITS

Author
YAMAMOTO M
NAGOYA INST. TECHNOL./NAGOYA-SHI/JPN
Source
SYST., COMPUT., CONTROLS; ISSN 0096-8765; USA; DA. 1978 PUBL. 1980; VOL. 9; NO 3; PP. 29-34; BIBL. 6 REF.
Document type
Article
Language
English
Keyword (fr)
DETECTION PANNE CIRCUIT LOGIQUE CIRCUIT COMBINATOIRE FIABILITE TEST CIRCUIT INFORMATIQUE MATHEMATIQUES APPLIQUEES
Keyword (en)
FAILURE DETECTION LOGIC CIRCUIT COMBINATORY CIRCUIT RELIABILITY COMPUTER SCIENCES APPLIED MATHEMATICS
Keyword (es)
INFORMATICA MATEMATICAS APPLICADAS
Classification
Pascal
001 Exact sciences and technology / 001A Sciences and techniques of general use / 001A02 Mathematics

Discipline
Mathematics
Origin
Inist-CNRS
Database
PASCAL
INIST identifier
PASCAL8130177414

Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS

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