DETERMINING IC LAYOUT RULES FOR COST MINIMIZATION
- Author
- RUNG RD
HEWLETT-PACKARD LAB./PALO ALTO CA 94304/USA - Source
- IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 1; PP. 35-43; BIBL. 25 REF.
- Document type
- Article
- Language
- English
- Keyword (fr)
- CIRCUIT INTEGRE CONCEPTION CIRCUIT COUT MINIMISATION OPTIMISATION ELECTRONIQUE
- Keyword (en)
- INTEGRATED CIRCUIT CIRCUIT DESIGN COST MINIMIZATION OPTIMIZATION ELECTRONICS
- Keyword (es)
- ELECTRONICA
- Classification
- Discipline
- Electronics
- Origin
- Inist-CNRS
- Database
- PASCAL
- INIST identifier
- PASCAL8130337881
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
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