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Special issue on low-power RF systemsCHANDRAKASAN, Anantha P.Proceedings of the IEEE. 2000, Vol 88, Num 10, issn 0018-9219, 153 p.Serial Issue

A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor ApplicationsYIP, Marcus; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2013, Vol 48, Num 6, pp 1453-1464, issn 0018-9200, 12 p.Article

Platform Architecture for Solar, Thermal, and Vibration Energy Combining With MPPT and Single InductorBANDYOPADHYAY, Saurav; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2012, Vol 47, Num 9, pp 2199-2215, issn 0018-9200, 17 p.Article

An ultra low energy 12-bit rate-resolution scalable SA ADC for wireless sensor nodesVERMA, Naveen; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2007, Vol 42, Num 6, pp 1196-1205, issn 0018-9200, 10 p.Article

A Supply-Rail-Coupled eTextiles Transceiver for Body-Area NetworksMERCIER, Patrick P; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2011, Vol 46, Num 6, pp 1284-1295, issn 0018-9200, 12 p.Article

Zero-Crossing Detector Based Reconfigurable Analog SystemLAJEVARDI, Payam; CHANDRAKASAN, Anantha P; LEE, Hae-Seung et al.IEEE journal of solid-state circuits. 2011, Vol 46, Num 11, pp 2478-2487, issn 0018-9200, 10 p.Conference Paper

Standby power reduction using dynamic voltage scaling and canary flip-flop structuresCALHOUN, Benton H; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2004, Vol 39, Num 9, pp 1504-1511, issn 0018-9200, 8 p.Article

Quantifying and enhancing power awareness of VLSI systems : System level designBHARDWAJ, Manish; MIN, Rex; CHANDRAKASAN, Anantha P et al.IEEE transactions on very large scale integration (VLSI) systems. 2001, Vol 9, Num 6, pp 757-772, issn 1063-8210Article

Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless SensorsCHEN, Fred; CHANDRAKASAN, Anantha P; STOJANOVIC, Vladimir M et al.IEEE journal of solid-state circuits. 2012, Vol 47, Num 3, pp 744-756, issn 0018-9200, 13 p.Article

A Highly Parallel and Scalable CABAC Decoder for Next Generation Video CodingSZE, Vivienne; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2012, Vol 47, Num 1, pp 8-22, issn 0018-9200, 15 p.Conference Paper

A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator RedundancyDALY, Denis C; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2009, Vol 44, Num 11, pp 3030-3038, issn 0018-9200, 9 p.Article

An application-specific protocol architecture for wireless microsensor networksHEINZELMAN, Wendi B; CHANDRAKASAN, Anantha P; BALAKRISHNAN, Hari et al.IEEE transactions on wireless communications. 2002, Vol 1, Num 4, pp 660-670, issn 1536-1276, 11 p.Article

Quad Full-HD Transform Engine for Dual-Standard Low-Power Video CodingRITHE, Rahul; CHENG, Chih-Chi; CHANDRAKASAN, Anantha P et al.IEEE journal of solid-state circuits. 2012, Vol 47, Num 11, pp 2724-2736, issn 0018-9200, 13 p.Article

Dual time-interleaved successive approximation register ADCs for an ultra-wideband receiverGINSBURG, Brian P; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2007, Vol 42, Num 2, pp 247-257, issn 0018-9200, 11 p.Article

A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOSSINANGIL, Mahmut E; VERMA, Naveen; CHANDRAKASAN, Anantha P et al.IEEE journal of solid-state circuits. 2009, Vol 44, Num 11, pp 3163-3173, issn 0018-9200, 11 p.Article

A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operationCALHOUN, Benton Highsmith; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2007, Vol 42, Num 3, pp 680-688, issn 0018-9200, 9 p.Article

An energy-efficient OOK transceiver for wireless sensor networks : 2006 Radio Frequency Integrated Circuits (RFTIC) SymposiumDALY, Denis C; CHANDRAKASAN, Anantha P.IEEE journal of solid-state circuits. 2007, Vol 42, Num 5, pp 1003-1011, issn 0018-9200, 9 p.Article

Calibration of Rent's rule models for three-dimensional integrated circuits : System-Level interconnect prediction (SLIP)DAS, Shamik; CHANDRAKASAN, Anantha P; REIF, Rafael et al.IEEE transactions on very large scale integration (VLSI) systems. 2004, Vol 12, Num 4, pp 359-366, issn 1063-8210, 8 p.Article

Bluetooth : A new low-power radio interface providing short-range connectivityHAARTSEN, Jaap C; MATTISSON, Sven.Proceedings of the IEEE. 2000, Vol 88, Num 10, pp 1651-1661, issn 0018-9219Article

Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits : Device technologies and circuit techniques for power managementVERMA, Naveen; KWONG, Joyce; CHANDRAKASAN, Anantha P et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 1, pp 163-174, issn 0018-9383, 12 p.Article

Instruction level and operating system profiling for energy exposed softwareSINHA, Amit; ICKES, Nathan; CHANDRAKASAN, Anantha P et al.IEEE transactions on very large scale integration (VLSI) systems. 2003, Vol 11, Num 6, pp 1044-1057, issn 1063-8210, 14 p.Article

A bus energy model for deep submicron technologySOTIRIADIS, Paul P; CHANDRAKASAN, Anantha P.IEEE transactions on very large scale integration (VLSI) systems. 2002, Vol 10, Num 3, pp 341-350, issn 1063-8210, 10 p.Article

Wiring requirement and three-dimensional integration technology for field programmable gate arrays : System-level interconnect prediction (SLIP)RAHMAN, Arifur; DAS, Shamik; CHANDRAKASAN, Anantha P et al.IEEE transactions on very large scale integration (VLSI) systems. 2003, Vol 11, Num 1, pp 44-54, issn 1063-8210, 11 p.Article

An ultra-wideband baseband front-endLEE, Fred S; WENTZLOFFAND, David D; CHANDRAKASAN, Anantha P et al.IEEE radio frequency integrated circuits symposium. 2004, pp 493-496, isbn 0-7803-8333-8, 1Vol, 4 p.Conference Paper

Frequency-Domain Analysis of Super-Regenerative AmplifiersBOHORQUEZ, Jose L; CHANDRAKASAN, Anantha P; DAWSON, Joel L et al.IEEE transactions on microwave theory and techniques. 2009, Vol 57, Num 12, pp 2882-2894, issn 0018-9480, 13 p., 1Article

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