au.\*:("CHANDRASHEKAR, Kailash")
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A 10 b 50 MS/s Opamp-Sharing Pipeline A/D With Current-Reuse OTAsCHANDRASHEKAR, Kailash; BAKKALOGLU, Bertan.IEEE transactions on very large scale integration (VLSI) systems. 2011, Vol 19, Num 9, pp 1610-1616, issn 1063-8210, 7 p.Article
A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling TechniqueHYUNG SEOK KIM; ORNELAS, Carlos; CHANDRASHEKAR, Kailash et al.IEEE journal of solid-state circuits. 2013, Vol 48, Num 7, pp 1721-1729, issn 0018-9200, 9 p.Conference Paper
A 2.4-GHz 20―40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOSRAVI, Ashoke; MADOGLIO, Paolo; BOCHOBZA-DEGANI, Ofir et al.IEEE journal of solid-state circuits. 2012, Vol 47, Num 12, pp 3184-3196, issn 0018-9200, 13 p.Conference Paper