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au.\*:("MAK, Pui-In")

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A Sine-LO Square-Law Harmonic-Rejection Mixer—Theory, Implementation, and ApplicationFUJIAN LIN; MAK, Pui-In; MARTINS, Rui P et al.IEEE transactions on microwave theory and techniques. 2014, Vol 62, Num 2, pp 313-322, issn 0018-9480, 10 p.Article

A 0.14-mm2 1.4-mW 59.4-dB-SFDR 2.4-GHz ZigBee/WPAN Receiver Exploiting a Split-LNTA + 50% LO Topology in 65-nm CMOSZHICHENG LIN; MAK, Pui-In; MARTINS, Rui P et al.IEEE transactions on microwave theory and techniques. 2014, Vol 62, Num 7, pp 1525-1534, issn 0018-9480, 10 p.Article

A 0.46-mm2 4-dB NF Unified Receiver Front-End for Full-Band Mobile TV in 65-nm CMOSMAK, Pui-In; MARTINS, Rui P.IEEE journal of solid-state circuits. 2011, Vol 46, Num 9, pp 1970-1984, issn 0018-9200, 15 p.Article

A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOSUN, Ka-Fai; MAK, Pui-In; MARTINS, Rui P et al.IEEE journal of solid-state circuits. 2013, Vol 48, Num 9, pp 2078-2089, issn 0018-9200, 12 p.Article

0.0012 mm2, 8 mW, single-to-differential converter with < 1.1% data cross error and < 3.4 ps RMS jitter up to 14 Gbit/s data rateYONG CHEN; MAK, Pui-In; LI ZHANG et al.Electronics letters. 2013, Vol 49, Num 11, pp 692-694, issn 0013-5194, 3 p.Article

0.013 mm2, kHz-to-GHz-bandwidth, third-order all-pole lowpass filter with 0.52-to-1.11 pW/pole/Hz efficiencyYONG CHEN; MAK, Pui-In; LI ZHANG et al.Electronics letters. 2013, Vol 49, Num 21, pp 1340-1342, issn 0013-5194, 3 p.Article

A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applicationsMAK, Pui-In; U, Seng-Pan; MARTINS, R. P et al.IEEE International Symposium on Circuits and Systems. 2004, pp 417-420, isbn 0-7803-8251-X, 4 p.Conference Paper

A 0.016-mm2 144-μW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBWZUSHU YAN; MAK, Pui-In; LAW, Man-Kay et al.IEEE journal of solid-state circuits. 2013, Vol 48, Num 2, pp 527-540, issn 0018-9200, 14 p.Article

Modeling of noise sources in reference voltage generator for very-high-speed pipelined ADCMOK, Weng-Ieng; MAK, Pui-In; U, Seng-Pan et al.MWSCAS : Midwest symposium on circuits and systems. 2004, isbn 0-7803-8346-X, 3Vol, Vol I, 5-8Conference Paper

A 3-D PWM control, H-bridge tri-level inverter for power quality compensation in three-phase four-wired systemsMAK, Pui-In; WONG, Man-Chung; U, Seng-Pan et al.IEEE International Symposium on Circuits and Systems. 2004, pp 948-951, isbn 0-7803-8251-X, 4 p.Conference Paper

Individual alpha neurofeedback training effect on short term memoryWENYA NAN; PEDRO RODRIGUES, Joao; JIALI MA et al.International journal of psychophysiology. 2012, Vol 86, Num 1, pp 83-87, issn 0167-8760, 5 p.Article

An I/Q-multiplexed and OTA-shared cmos pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiverMAK, Pui-In; MA, Kin-Kwan; MOK, Weng-Ieng et al.IEEE International Symposium on Circuits and Systems. 2004, pp 1068-1071, isbn 0-7803-8251-X, 4 p.Conference Paper

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