Finite word effects in pipelined recursive filtersPARHI, K. K.IEEE Transactions on signal processing. 1991, Vol 39, Num 6, pp 1450-1454Article

Pipelining in algorithms with quantizer loopsPARHI, K. K.IEEE transactions on circuits and systems. 1991, Vol 38, Num 7, pp 745-754, issn 0098-4094, 10 p.Article

Calculation of minimum number of registers in arbitrary life time chartPARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1994, Vol 41, Num 6, pp 434-436, issn 1057-7130Article

A systematic approach for design of digit-serial signal processing architecturesPARHI, K. K.IEEE transactions on circuits and systems. 1991, Vol 38, Num 4, pp 358-375, issn 0098-4094, 18 p.Article

High-speed VLSI architectures for Huffman and Viterbi decodersPARHI, K. K.IEEE Transactions on circuits and systems. II : Analog and digital signal processing. 1992, Vol 39, Num 6, pp 385-391Article

Video data format converters using minimum number of registersPARHI, K. K.VLSI circuits and systems for video applications. IEEE Transactions on circuits and systems for video technology. 1992, Vol 2, Num 2, pp 255-267Book Chapter

Low-energy CSMT carry generators and binary addersPARHI, K. K.IEEE transactions on very large scale integration (VLSI) systems. 1999, Vol 7, Num 4, pp 450-462, issn 1063-8210Article

Pipelining in dynamic programming architecturesPARHI, K. K.IEEE Transactions on signal processing. 1991, Vol 39, Num 6, pp 1442-1450Article

Design of data format converters using two-dimensional register allocationMAJUMDAR, M; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1998, Vol 45, Num 4, pp 504-508, issn 1057-7130Article

STAR recursive least square lattice adaptive filtersLI, Y; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1997, Vol 44, Num 12, pp 1040-1054, issn 1057-7130Article

High-level DSP synthesis using concurrent transformations, scheduling, and allocation$CHING-YI WANG; PARHI, K. K.IEEE transactions on computer-aided design of integrated circuits and systems. 1995, Vol 14, Num 3, pp 274-295, issn 0278-0070Article

A pipelined adaptive differential vector quantizer for low-power speech coding applicationsSHANBHAG, N. R; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1993, Vol 40, Num 5, pp 347-349, issn 1057-7130Article

Two-dimensional retimingDENK, T. C; PARHI, K. K.IEEE transactions on very large scale integration (VLSI) systems. 1999, Vol 7, Num 2, pp 198-211, issn 1063-8210Article

Pipelined lattice WDF design for wideband filtersJIN-GYUN CHUNG; HOJUN KIM; PARHI, K. K et al.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1995, Vol 42, Num 9, pp 616-618, issn 1057-7130Article

Sequential and parallel neural network vector quantizersPARHI, K. K; WU, F. H; GENESAN, K et al.IEEE transactions on computers. 1994, Vol 43, Num 1, pp 104-109, issn 0018-9340Article

A pipelined adaptive lattice filter architectureSHANBHAG, N. R; PARHI, K. K.IEEE transactions on signal processing. 1993, Vol 41, Num 5, pp 1925-1939, issn 1053-587XArticle

Efficient semisystolic architectures for finite-field arithmeticJAIN, S. K; LEILEI SONG; PARHI, K. K et al.IEEE transactions on very large scale integration (VLSI) systems. 1998, Vol 6, Num 1, pp 101-113, issn 1063-8210Article

Concurrent cellular VLSI adaptive filter architecturesPARHI, K. K; MESSERSCHMITT, D. G.IEEE transactions on circuits and systems. 1987, Vol 34, Num 10, pp 1141-1151, issn 0098-4094Article

Exhaustive scheduling and retiming of digital signal processing systemsDENK, T. C; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1998, Vol 45, Num 7, pp 821-838, issn 1057-7130Article

Low-area dual basis divider over GF(2^M)SONG, L; PARHI, K. K.International conference on acoustics, speech, and signal processing. 1997, pp 627-630, isbn 0-8186-7919-0Conference Paper

Pipelined adaptive DFE architectures using relaxed look-aheadSHANBHAG, N. R; PARHI, K. K.IEEE transactions on signal processing. 1995, Vol 43, Num 6, pp 1368-1385, issn 1053-587XArticle

Scaled normalized lattice digital filter structuresJIN-GYUN CHUNG; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1995, Vol 42, Num 4, pp 278-282, issn 1057-7130Article

Finite-precision analysis of the pipelined ADPCM coderSHANDHAG, N. R; PARHI, K. K.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1994, Vol 41, Num 5, issn 1057-7130, s.pArticle

Static rate-optimal scheduling of iterative data-flow programs via optimum unfoldingPARHI, K. K; MESSERSCHMITT, D. G.IEEE transactions on computers. 1991, Vol 40, Num 2, pp 178-195, issn 0018-9340, 18 p.Article

On optimizing importance sampling simulationsPARHI, K. K; BERKOWITZ, R. S.IEEE transactions on circuits and systems. 1987, Vol 34, Num 12, pp 1558-1563, issn 0098-4094Article