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SYSTOLIC CELLULAR LOGIC: INEXPENSIVE PARALLEL IMAGE PROCESSORSTANIMOTO SL.1981; CONFERENCE ON PATTERN RECOGNITION AND IMAGE PROCESSING/1981/DALLAS TX; USA; NEW YORK: IEEE; DA. 1981; PP. 306-309; BIBL. 4 REF.Conference Paper

Conception et étude de l'architecture parallèle de traitement d'images GFLOPS = Design and study of the Image Processing Parallel Architecture GFLOPSHOUZET, Dominique; BASILLE, Jean-Luc.1992, 200 p.Thesis

Un processeur de traitement d'images pour la morphologie mathématique. Application à l'analyse en temps réel du trafic routier = Image processor for mathematical morphology. Application to real time traffic analysisBouzar, Salah; Fluhr, Christian.1990, 220 p.Thesis

From EARTH to HTMT : An evolution of a multiheaded Architecture modelGAO, G. R.Lecture notes in computer science. 1999, issn 0302-9743, isbn 3-540-65831-9, p. 1025Conference Paper

Décomposition dynamique et parallèlisme multi-tâche en analyse de structureCroset, Patricia; Noailles, J.1989, 236 p.Thesis

Contribution à la réalisation d'un simulateur de réseaux ATM = Contribution for the implementation of an ATM network simulatorVedrenne, Alain; Menez, Jean.1992, 202 p.Thesis

Une machine systolique adaptée à la correction de chaînes de caractères. Application aux adresses postales = A systolic machine for string correction. Application to mail addressesScharbarg, Jean-luc; Quinton, Patrice.1990Thesis

Rapid and energy-efficient testing for embedded coresYINHE HAN; YU HU; HUAWEI LI et al.Asian test symposium. 2004, pp 8-13, isbn 0-7695-2235-1, 1Vol, 6 p.Conference Paper

Un environnement de transformations de programmes pour la synthèse d'architectures régulières = A program transformation tool for regular array synthesisLe Verge, Hervé; Quinton, Patrice.1992, 122 p.Thesis

Conception et mise en œuvre d'un ASIC de morphologie mathématique à architecture programmable = Design and utilization of an ASIC of mathematical morphology with a programmable architecturePeyrard, René; Gallice, Jean.1992, 213 p.Thesis

Architecture massivement parallèle : un réseau de cellules intégré pour la reconstruction d'imagesLattard, Didier; Mazare, Guy.1989, 311 p.Thesis

AVS/Express: un environnement de visualisation et de conception de chaînes de traitement d'images comme entrée de SynDEx = AVS/Express: A new environment for image processing and data visualizationDEFORGES, O; LECLERT, J; ASSOUIL, M et al.Journées thématiques universités/industries sur l'adéquation algorithme-architecture pour les applications temps réel industrielles complexes. 1999, pp 10-17, 2VolConference Paper

Row-column parallel turbo decoding of product codesJEGO, C; ADDE, P.Electronics Letters. 2006, Vol 42, Num 5, pp 296-298, issn 0013-5194, 3 p.Article

Support for irregular computations in massively parallel PIM arrays, using an object-based execution modelZIMA, H. P; STERLING, T. L.Lecture notes in computer science. 2000, pp 450-456, issn 0302-9743, isbn 3-540-67442-XConference Paper

Thresholding for work distribution of recursive, multithreaded functionsZOPPETTI, G. M; AGRAWAL, G; POLLOCK, L. L et al.Lecture notes in computer science. 2000, pp 485-489, issn 0302-9743, isbn 3-540-67858-1Conference Paper

Time skewing for parallel computersWONNACOTT, D.Lecture notes in computer science. 2000, pp 477-480, issn 0302-9743, isbn 3-540-67858-1Conference Paper

Compiling for SIMD Within a registerFISHER, R. J; DIETZ, H. G.Lecture notes in computer science. 1999, pp 290-304, issn 0302-9743, isbn 3-540-66426-2Conference Paper

On the CLUMPS model of parallel computationCAMPBELL, D. K. G.Information processing letters. 1998, Vol 66, Num 5, pp 231-236, issn 0020-0190Article

Massive parallelization of NMC's spectral modelSELA, J. G; ANDERSON, P. B; NORTON, D. W et al.Journal of parallel and distributed computing (Print). 1994, Vol 21, Num 1, pp 140-149, issn 0743-7315Article

Universal decoding algorithm for binary quadratic residue codes using syndrome-weight determinationJING, M.-H; CHANG, Y; CHEN, Z.-H et al.Electronics letters. 2009, Vol 45, Num 13, pp 692-694, issn 0013-5194, 3 p.Article

Using the BSP cost model to optimise parallel neural network trainingROGERS, R. O; SKILLICORN, D. B.Lecture notes in computer science. 1998, pp 297-305, issn 0302-9743, isbn 3-540-64359-1Conference Paper

Performance characteristics of the connection machine hypertree networkLIN, M; TSANG, R. P; DU, D. H et al.Journal of parallel and distributed computing (Print). 1993, Vol 19, Num 3, pp 245-254, issn 0743-7315Article

UNE ARCHITECTURE PARALLELE ASYNCHRONE POUR LES SYSTEMES DE COMMANDE.COURVOISIER M.sdIN: RESEAUX PETRI. JOURN. ETUD. RESEAUX PETRI; PARIS; 1977; PARIS; INST. PROGRAMMATION; DA. S.D.; PP. 55-72; ABS. ANGL.; BIBL. 1 P. 1/2Conference Paper

Parallel computer architecture and instruction-level parallelismGAUDIOT, Jean-Luc.Lecture notes in computer science. 2002, issn 0302-9743, isbn 3-540-44049-6, p. 457Conference Paper

A non-binary parallel arithmetic architectureRONG LIN; SCHWING, J. L.Lecture notes in computer science. 2000, pp 149-154, issn 0302-9743, isbn 3-540-67442-XConference Paper

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