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kw.\*:("Circuito logico")

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Multilevel logical networksKARPOVSKY, M.IEEE transactions on computers. 1987, Vol 36, Num 2, pp 215-226, issn 0018-9340Article

Hard magnetic cylindrical domains (HMD) as elements of multistate logicSZKODNY, T.Bulletin of the Polish Academy of Sciences. Technical sciences. 1984, Vol 32, Num 5-6, pp 333-339, issn 0239-7528Article

Evaluating the signal-reliability of logic circuitsKYUNG-SHIK KOH.IEEE transactions on reliability. 1985, Vol 34, Num 3, pp 233-235, issn 0018-9529Article

Properties of wired logicKAMBAYASHI, Y; MUROGA, S.IEEE transactions on computers. 1986, Vol 35, Num 6, pp 550-563, issn 0018-9340Article

A 3.6-ns ECL field programmable array logic deviceMILLHOLLAN, M. S; CHIAKANG SUNG.IEEE journal of solid-state circuits. 1985, Vol 20, Num 5, pp 1036-1042, issn 0018-9200Article

Theoretical and experimental analysis ogf a-Si: H logic circuitsLEROUX, T; TRUCHE, R; CHENEVAS-PAULE, A et al.IEEE electron device letters. 1985, Vol 6, Num 11, pp 604-605, issn 0741-3106Article

Design-performance trade-offs in CMOS-domino logicOKLOBDZIJA, V. G; MONTOYE, R. K.IEEE journal of solid-state circuits. 1986, Vol 21, Num 2, pp 304-306, issn 0018-9200Article

Low-power Si-bipolar multi-Gbit/s logics having the same function as ECL100K familyYAMANAKA, N; MIYANAGA, H; YAMAMOTO, Y et al.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1986, Vol 69, Num 10, pp 1068-1071, issn 0387-236XArticle

Fast analysis of MUX synthesis of logical functions from the splitting frontiers of the Karnaugh mapKHALID-NACIRI, A; LOTFI, Z; TOSSER, A. J et al.International journal of electronics. 1985, Vol 59, Num 3, pp 333-342, issn 0020-7217Article

A new family of modular microcontrollers with on-chip support functionsBOCQUET, C; MARQUOT, A; GAUDRONNEAU, Y et al.IEEE journal of solid-state circuits. 1986, Vol 21, Num 3, pp 400-403, issn 0018-9200Article

Comparative logic ratings for current high-speed field-effect transistorsGIACOLETTO, L. J.I.E.E.E. transactions on electron devices. 1986, Vol 33, Num 11, pp 1835-1836, issn 0018-9383Article

A new cell-based interconnection networkJA-LING WU; TENG-PIN LIN.International journal of electronics. 1985, Vol 59, Num 3, pp 375-382, issn 0020-7217Article

Simple JCCD logic at 20MHzHOEKSTRA, J.Electronics Letters. 1987, Vol 23, Num 5, pp 246-248, issn 0013-5194Article

Latched domino CMOS logicPRETORIUS, J. A; SHUBAT, A. S; SALAMA, C. A. T et al.IEEE journal of solid-state circuits. 1986, Vol 21, Num 4, pp 514-522, issn 0018-9200Article

On path enumerationSURESH RAI; ARUN KUMAR.International journal of electronics. 1986, Vol 60, Num 3, pp 421-425, issn 0020-7217Article

Construction de structures microondes homogènes pour calculateurs rapidesBARANTSEVA, O. D.Radiotehnika (Moskva). 1986, Num 3, pp 3-9, issn 0033-8486Article

PLA folding algorithm from compatibility relationsBISWAS, N. N.Electronics Letters. 1985, Vol 21, Num 21, pp 984-986, issn 0013-5194Article

Ultrahigh-speed logic gate family with Nb/Al-AlOx/Nb Josephson junctionsKOTANI, S; FUJIMAKI, N; IMAMURA, T et al.I.E.E.E. transactions on electron devices. 1986, Vol 33, Num 3, pp 379-384, issn 0018-9383Article

Nichtklassische Zielstellungen des Logikentwurfs = Problèmes non classiques en conception logique = Non classical problems in logic designBOCHMANN, D.Wissenschaftliche Zeitschrift der Technischen Hochschule Karl-Marx-Stadt. 1986, Vol 28, Num 4, pp 518-521, issn 0372-7610Article

Negation is powerless for boolean slice functionsVALIANT, L. G.SIAM journal on computing (Print). 1986, Vol 15, Num 2, pp 531-535, issn 0097-5397Article

FET scaling in domino CMOS gatesSHOJI, M.IEEE journal of solid-state circuits. 1985, Vol 20, Num 5, pp 1067-1071, issn 0018-9200Article

Regenerative logic circuits with CMOS transistorsDOKIC, B. L; BUNDALO, Z. V.International journal of electronics. 1985, Vol 58, Num 6, pp 907-920, issn 0020-7217Article

A Josephson logic gate arrayHARADA, Y; HATANO, Y; YAMASHITA, K et al.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1985, Vol 68, Num 7, pp 476-483, issn 0387-236XArticle

Serial-data computation on twin pipelinesMCGREGOR, M. S; SMITH, S. G; DENYER, P. B et al.Electronics Letters. 1987, Vol 23, Num 6, pp 292-293, issn 0013-5194Article

Clocking schemes for high speed digital systemsUNGER, S. H; CHUNG-JEN TAN.IEEE transactions on computers. 1986, Vol 35, Num 10, pp 880-895, issn 0018-9340Article

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