Pascal and Francis Bibliographic Databases

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An efficient CMOS buffer for driving large capacitive loadsWONG, S. L; SALAMA, C. A. T.IEEE journal of solid-state circuits. 1986, Vol 21, Num 3, pp 464-469, issn 0018-9200Article

Buffer block planning for interconnect planning and predictionCONG, Jason; TIANMING KONG; ZHIGANG PAN et al.IEEE transactions on very large scale integration (VLSI) systems. 2001, Vol 9, Num 6, pp 929-937, issn 1063-8210Article

Simple but effective modification to a multiplicative congruential random-number generatorCHAMBERS, W. G; DAI, Z. D.IEE proceedings. Part E. Computers and digital techniques. 1991, Vol 138, Num 3, pp 121-122, issn 0143-7062Article

Switched capacitor impedance simulation circuit with unity gain buffersHORIO, Y; YAMAMOTO, M; MORI, S et al.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1986, Vol 69, Num 5, pp 610-619, issn 0387-236XArticle

High-frequency switched-capacitor filter using unity-gain buffersDE LA PLAZA, A.IEEE journal of solid-state circuits. 1986, Vol 21, Num 3, pp 470-477, issn 0018-9200Article

Network flow based buffer planningXIAOPING TANG; WONG, D. F.Integration (Amsterdam). 2001, Vol 30, Num 2, pp 143-155, issn 0167-9260Article

VGS compensation source follower for the LTPS TFT LCD data driver output bufferSHIH, Jun-Ren; CHEN, Shang-Li; BOWEN WANG et al.SPIE proceedings series. 2000, pp 59-67, isbn 0-8194-3718-2Conference Paper

Performance analysis of slotted rings with finite buffersLEE, W.-S. R.IEE proceedings. Part E. Computers and digital techniques. 1992, Vol 139, Num 3, pp 215-220, issn 0143-7062Article

Performance of deltta networks using multiple channels and output buffersGHOSH, D; DALY, J. C.Electronics Letters. 1991, Vol 27, Num 9, pp 761-762, issn 0013-5194, 2 p.Article

Receiver buffer behavior for the selective-repeat ARQ protocolBRUNEEL, H; DE VRIENDT, J; YSEBAERT, C et al.Computer networks and ISDN systems. 1990, Vol 19, Num 2, pp 129-142, issn 0169-7552, 14 p.Article

5 V compatibility with 3.3 V-only CMOS ASICsHENDERSON, B; GAL, L.Microelectronics journal. 1992, Vol 23, Num 8, pp 577-580, issn 0959-8324Article

A 35 to 45 GHz low noise or buffer amplifier with wide dynamic rangeMicrowave journal (Euro-global edition). 2003, Vol 46, Num 9, pp 226-228, issn 0192-6217, 2 p.Article

Model for metal interconnection design rule optimizationPAL, D. K; PANDEY, S. M; JAIN, H et al.Microelectronic engineering. 2001, Vol 56, Num 3-4, pp 295-302, issn 0167-9317Article

LO buffers/splitters ease LO drive designsLACHAPELLE, John; AHNE, Jim.Microwaves & RF. 2003, Vol 42, Num 2, pp 89-98, issn 0745-2993, 6 p.Article

Prelayout estimation of individual wire lengthsBODAPATI, Srinivas; NAJM, Farid N.IEEE transactions on very large scale integration (VLSI) systems. 2001, Vol 9, Num 6, pp 943-958, issn 1063-8210Article

Stray-insensitive switched-capacitor sample-delay-hold buffers for video frequency applicationsRUJNS, J. J. F; WALLINGA, H.Electronics Letters. 1991, Vol 27, Num 8, pp 639-640, issn 0013-5194, 2 p.Article

On-the-fly estimation of IC macromodelsSTIEVANO, I. S; MAIO, I. A; CANAVERO, F. G et al.Electronics Letters. 2006, Vol 42, Num 14, pp 801-803, issn 0013-5194, 3 p.Article

Output buffer impedance control and noise reduction using a speed-locked loopBAZES, Mel.IEEE International Solid-State Circuits Conference. 2004, pp 486-487, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

New path balancing algorithm for glitch power reductionKIM, S; KIM, J; HWANG, S.-Y et al.IEE proceedings. Circuits, devices and systems. 2001, Vol 148, Num 3, pp 151-156, issn 1350-2409Article

New symmetrical buffer design for VLSI applicationsCHOW, Hwang-Cherng; FENG, Wu-Shiung.International journal of electronics. 2001, Vol 88, Num 7, pp 779-787, issn 0020-7217Article

Modifications to increase accuracy and consistency of anticoagulant delivery using the Fenwal CS3000 PlusBURGSTALER, E. A; PINEDA, A. A; GEISSLER, U. C et al.Journal of clinical apheresis (Print). 1995, Vol 10, Num 4, pp 203-209, issn 0733-2459Article

Very-high-frequency CMOS analogue bufferXU, P; SCHAUMANN, R.Electronics Letters. 1993, Vol 29, Num 16, pp 1458-1460, issn 0013-5194Article

Concentration of bone marrow mononuclear cells using a programmable blood cell separatorORLINA, A. R; CONANT, J. C; DECHRISTOPHER, P. J et al.Journal of clinical apheresis (Print). 1991, Vol 6, Num 3, pp 137-142, issn 0733-2459Article

Dual wavelength signals buffered in DLOB and its improvement by power equalizationCHANGYONG TIAN; CHONGQING WU; GUANGNA SUN et al.Proceedings of SPIE, the International Society for Optical Engineering. 2008, Vol 7136, pp 713617.1-713617.8, issn 0277-786X, isbn 978-0-8194-7376-9 0-8194-7376-6, 2Conference Paper

Dynamic frequency tracking and phase error compensation clock de-skew bufferCHENG, K.-H; HONG, K.-W; LO, Y.-L et al.Electronics letters. 2010, Vol 46, Num 25, pp 1653-1655, issn 0013-5194, 3 p.Article

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