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Results 1 to 25 of 313

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A simple compact model for long-channel junctionless Double Gate MOSFETsLIME, François; SANTANA, Ernesto; INIGUEZ, Benjamin et al.Solid-state electronics. 2013, Vol 80, pp 28-32, issn 0038-1101, 5 p.Article

Unification of MOS compact models with the unified regional modeling approach : Computational Electronics in Asia and Selected Papers from IWCE 2009 in BeijingXING ZHOU; GUOJUN ZHU; GUAN HUEI SEE et al.Journal of computational electronics (Print). 2011, Vol 10, Num 1-2, pp 121-135, issn 1569-8025, 15 p.Article

A charge-based compact model for predicting the current-voltage and capacitance-voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETsFEILONG LIU; JIAN ZHANG; HE, Frank et al.Solid-state electronics. 2009, Vol 53, Num 1, pp 49-53, issn 0038-1101, 5 p.Article

Performance-Aware Corner Model for Design for ManufacturingLIN, Chung-Hsun; DUNGA, Mohan V; LU, Darsen D et al.I.E.E.E. transactions on electron devices. 2009, Vol 56, Num 4, pp 595-600, issn 0018-9383, 6 p.Article

A phase change memory compact model for multilevel applicationsVENTRICE, D; FANTINI, P; REDAELLI, Andrea et al.IEEE electron device letters. 2007, Vol 28, Num 11, pp 973-975, issn 0741-3106, 3 p.Article

A physics-based analytical solution to the surface potential of polysilicon thin film transistors using the Lambert W functionRONGSHENG CHEN; XUEREN ZHENG; WANLING DENG et al.Solid-state electronics. 2007, Vol 51, Num 6, pp 975-981, issn 0038-1101, 7 p.Article

Synthesized compact models and experimental verifications for substrate noise coupling in mixed-signal ICsHAI LAN; TZE WEE CHEN; CHI ON CHUI et al.IEEE journal of solid-state circuits. 2006, Vol 41, Num 8, pp 1817-1829, issn 0018-9200, 13 p.Conference Paper

Thermal compact models for electronic systemsBOSCH, E. G. T; SABRY, M. N.Annual IEEE Semiconductor Thermal Measurement and Management Symposium. 2002, pp 21-29, issn 1065-2221, isbn 0-7803-7327-8, 9 p.Conference Paper

Trans-capacitance modeling in junctionless gate-all-around nanowire FETsJAZAERI, Farzan; BARBUT, Lucian; SALLESE, Jean-Michel et al.Solid-state electronics. 2014, Vol 96, pp 34-37, issn 0038-1101, 4 p.Article

Beyond Black's equation: Full-chip EM/SM assessment in 3D IC stackSUKHAREV, Valeriy.Microelectronic engineering. 2014, Vol 120, pp 99-105, issn 0167-9317, 7 p.Conference Paper

Modeling and Design Guidelines for P+ Guard Rings in Lightly Doped CMOS SubstratesMING SHEN; MIKKELSEN, Jan Hvolgaard; KE ZHANG et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 9, pp 2854-2861, issn 0018-9383, 8 p.Article

Physics-Based SPICE-Compatible Compact Model for Simulating Hybrid MTJ/CMOS CircuitsPANAGOPOULOS, Georgios D; AUGUSTINE, Charles; ROY, Kaushik et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 9, pp 2808-2814, issn 0018-9383, 7 p.Article

Gate leakage current partitioning in nanoscale double gate MOSFETs, using compact analytical modelDARBANDY, Ghader; LIME, François; CERDEIRA, Antonio et al.Solid-state electronics. 2012, Vol 75, pp 22-27, issn 0038-1101, 6 p.Article

Analytical current equation for short channel SOI multigate FETs including 3D effectsKLOES, Alexander; WEIDEMANN, Michaela; SCHWARZ, Mike et al.Solid-state electronics. 2010, Vol 54, Num 11, pp 1408-1415, issn 0038-1101, 8 p.Article

Explicit compact model for symmetric double-gate MOSFETs including solutions for small-geometry effectsDIAGNE, Birahim; PREGALDINY, Fabien; LALLEMENT, Christophe et al.Solid-state electronics. 2008, Vol 52, Num 1, pp 99-106, issn 0038-1101, 8 p.Article

A compact deep-submicron MOSFET gds model including hot-electron and thermoelectric effectsZHOU, X; CHIAH, S. B; LIM, K. Y et al.Solid-state electronics. 2004, Vol 48, Num 12, pp 2125-2131, issn 0038-1101, 7 p.Article

A continuous semi-empiric transfer characteristics model for surrounding gate undoped polysilicon nanowire MOSFETsGARCIA-SANCHEZ, F. J; LATORRE-REY, A. D; LIU, W et al.Solid-state electronics. 2011, Vol 63, Num 1, pp 22-26, issn 0038-1101, 5 p.Article

Compact Modeling of Partially Depleted Silicon-on-Insulator Drain-Extended MOSFET (DEMOSFET) Including High-Voltage and Floating-Body EffectsTARUN KUMAR AGARWAL; AMIT RANJAN TRIVEDI; VAIDYANATHAN SUBRAMANIAN et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 10, pp 3485-3493, issn 0018-9383, 9 p.Article

Inclusion of the Accumulation Region in the Compact Models of Bulk and SOI FinFETsDESSAI, Gajanan; GILDENBLAT, Gennady.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 8, pp 2644-2651, issn 0018-9383, 8 p.Article

Quasi-2-Dimensional Compact Resistor Model for the Drift Region in High-Voltage LDMOS DevicesTANAKA, Akihiro; ORITSUKI, Yasunori; KIKUCHIHARA, Hideyuki et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 7, pp 2072-2080, issn 0018-9383, 9 p.Article

Compact Model for Organic Thin-Film TransistorLING LI; MARIEN, Hagen; GENOE, Jan et al.IEEE electron device letters. 2010, Vol 31, Num 3, pp 210-212, issn 0741-3106, 3 p.Article

Compact modeling of quantum effects in symmetric double-gate MOSFETsWEI WANG; HUAXIN LU; JOOYOUNG SONG et al.Microelectronics journal. 2010, Vol 41, Num 10, pp 688-692, issn 0959-8324, 5 p.Article

Hierarchical Simulation of Statistical Variability: From 3-D MC With ab initio Ionized Impurity Scattering to Statistical Compact ModelsKOVAC, Urban; ALEXANDER, Craig; ROY, Gareth et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 10, pp 2418-2426, issn 0018-9383, 9 p.Article

A Physical-Based PSPICE Compact Model for Poly(3-hexylthiophene) Organic Field-Effect TransistorsMEIXNER, Ronald M; GÖBEL, Holger H; HAIDI QIU et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 7, pp 1776-1781, issn 0018-9383, 6 p.Article

Vertical silicon-on-nothing FET : Threshold voltage calculation using compact capacitance modelSVILICIC, B; JOVANOVIC, V; SULIGOJ, T et al.Solid-state electronics. 2008, Vol 52, Num 10, pp 1505-1511, issn 0038-1101, 7 p.Conference Paper

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