A compact DC model of gate oxide short defectBOUCHAKOUR, R; PORTAL, J. M; GALLIERE, J. M et al.Microelectronic engineering. 2004, Vol 72, Num 1-4, pp 140-148, issn 0167-9317, 9 p.Conference Paper

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Ultrathin dielectric filmsBUCHANAN, D. A.IBM journal of research and development. 1999, Vol 43, Num 3, issn 0018-8646, 176 p.Serial Issue

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Rare-earth oxide thin films as gate oxides in MOSFET transistorsLESKELÄ, Markku; RITALA, Mikko.Journal of solid state chemistry (Print). 2003, Vol 171, Num 1-2, pp 170-174, issn 0022-4596, 5 p.Conference Paper

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