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Fault equivalence in PLAs and prevention designLIU, B.-D; SHAW, G.-T.Electronics Letters. 1990, Vol 26, Num 23, pp 1925-1926, issn 0013-5194Article

Three-step heuristic algorithm for optimal PLA column foldingYANG, Y.-Y; KYUNG, C.-M.Electronics Letters. 1988, Vol 24, Num 17, pp 1088-1090, issn 0013-5194Article

Built in test of folded PLAsFERNANDES, A. O; COURTOIS, B.Rapport de recherche - IMAG. 1988, issn 0750-7380, 23 p.Report

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