New intra-gate-offset high-voltage thin-film transistor with misalignment immunityHUANG, T.-Y; LEWIS, A. G; WU, I.-W et al.Electronics Letters. 1989, Vol 25, Num 8, pp 544-545, issn 0013-5194, 2 p.Article

Transistor haute tension à injection de photons à base d'une hétérostructureGRIGOR'EV, B. I; KOROL'KOV, V. I; ROZHKOV, A. V et al.Fizika i tehnika poluprovodnikov. 1985, Vol 19, Num 5, pp 878-884, issn 0015-3222Article

Simple analytical one-dimensional model for saturation operation of the high-voltage bipolar power transitorWRIGHT, G. T; FRANGOS, P. P.IEE proceedings. Part I. Solid-state and electron devices. 1984, Vol 131, Num 6, pp 207-212, issn 0143-7100Article

Structural analysis and experimental characteristics of high-voltage bipolar transistors with shallow junctionsSAKURAI, T; OHNO, T.Japanese journal of applied physics. 1984, Vol 23, Num 4, pp 415-419, issn 0021-4922, 1Article

A novel CMOS-compatible high-voltage transistor structureZAHIR PARPIA; MENA, J. G; SALAMA, C. A. T et al.I.E.E.E. transactions on electron devices. 1986, Vol 33, Num 12, pp 1948-1952, issn 0018-9383Article

SIRET®, A 1000 V bipolar transistor with no two-dimensional parasitic effectsMILLER, G; PORST, A; STRACK, H et al.Siemens Forschungs- und Entwicklungsberichte. 1988, Vol 17, Num 1, pp 27-34, issn 0370-9736Article

The silica glass passivation for high-voltage power transistorsLIU, B. D; CHANG, C. Y; CHEN, K. C et al.International journal of electronics. 1987, Vol 62, Num 6, pp 857-861, issn 0020-7217Article

Processus transitoires dans les transistors à haute tension à injection par photons à base d'hétérojonctionsGRIGOR'EV, B. I; ZADIRANOV, YU. M; KOROL'KOV, V. I et al.Fizika i tehnika poluprovodnikov. 1986, Vol 20, Num 4, pp 677-682, issn 0015-3222Article

Power bipolar devicesLETURCQ, P.Microelectronics and reliability. 1984, Vol 24, Num 2, pp 313-337, issn 0026-2714Article

First study on superjunction high-voltage transistors with n-columns formed by proton implantation and annealingRÜB, M; BÄR, M; NIEDERNOSTHEIDE, F.-J et al.International Symposium on Power Semiconductor Devices & ICs. 2004, pp 181-184, isbn 4-88686-060-5, 4 p.Conference Paper

500 V, N-channel atomic lattice layout (ALL) IGBT's with superior latching immunityVIJAY PARTHASARATHY; SO, K. C; SHEN, Z et al.IEEE electron device letters. 1995, Vol 16, Num 7, pp 325-327, issn 0741-3106Article

A MICROWAVE HIGH VOLTAGE BIPOLAR POWER TRANSISTOR.VERMA KB; WESTLAKE RT.1975; IN: INT. ELECTRON DEVICES MEET.; WASHINGTON, D.C.; 1975; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1975; PP. 155-158; BIBL. 5 REF.Conference Paper

1-KW-SCAHLTVERSTAERKER MIT HOCHSPANNUNGSTRANSISTOREN = AMPLIFICATEUR DE COMMUTATION DE 1 KW A TRANSISTORS A HAUTE TENSIONWASELOWSKI B.1981; RADIO FERNS. ELEKTRON.; ISSN 0033-7900; DDR; DA. 1981; NO 12; PP. 751-755; BIBL. 3 REF.Article

HIGH-VOLTAGE POWER SWITCHING TRANSISTORSJARL R; VERBIEST N.1979; NEW ELECTRON.; GBR; DA. 1979; VOL. 12; NO 8; PP. 33-37Article

REPORT ON THE WORK ON DISCRETE DEVICES: HIGH VOLTAGE TRANSISTORS AND VARACTOR DIODESKHOKLE WS.1980; J. INSTIT. ELECTRON. TELECOMMUNIC. ENGRS; IND; DA. 1980; VOL. 26; NO 2; PP. 142-144; BIBL. 7 REF.Article

INDUCTIVE SWITCHING OF HIGH VOLTAGE TRANSISTORSLEAR T.1979; NEW ELECTRON.; GBR; DA. 1979; VOL. 12; NO 4; PP. 28Article

REALISEZ VOTRE CIRCUIT DE DEFLEXION VERTICALE A L'AIDE DE TRANSISTORS HAUTE TENSION.PERRIN JC.1976; ELECTRON. MICROELECTRON. INDUSTR.; FR.; DA. 1976; NO 219; PP. 27-31Article

ETABLISSEMENT DE L'ETAT STATIONNAIRE LORS DU BRANCHEMENT D'UN TRANSISTOR HT DE PUISSANCEGRIGOR'EV BI; RUDSKIJ VA; TOGATOV VV et al.1983; RADIOTEHNIKA I ELEKTRONIKA; ISSN 508322; SUN; DA. 1983; VOL. 28; NO 6; PP. 1176-1181; BIBL. 7 REF.Article

LA COMMANDE DE BASE DES TRANSISTORS HAUTE TENSIONRISCHMUELLER K.1979; ELECTRONIQUE; CHE; DA. 1979; NO 5-6; PP. EL1-EL5Article

HIGHLY RELIABLE HIGH-VOLTAGE TRANSISTORS BY USE OF THE SIPOS PROCESS.MATSUSHITA T; AOKI T; OTSU T et al.1975; IN: INT. ELECTRON DEVICES MEET.; WASHINGTON, D.C.; 1975; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1975; PP. 167-170; BIBL. 6 REF.Conference Paper

One-dimensional approach for floating field limiting ring enhanced high-voltage power transistor designLIU, B. D; SUNE, C. T.International journal of electronics. 1989, Vol 66, Num 6, pp 891-899, issn 0020-7217Article

Safe operating area for 1200-V nonlatchup bipolar mode MOSFET'sNAKAGAWA, A; YAMAGUCHI, Y; WATANABE, K et al.I.E.E.E. transactions on electron devices. 1987, Vol 34, Num 2, pp 351-355, issn 0018-9383Article

Device simulation of a n-DMOS cell with trench isolationKAMOULAKOS, G; HANIOTAKIS, Th; TSIATOUHAS, Y et al.Microelectronics journal. 2001, Vol 32, Num 1, pp 75-80, issn 0959-8324Article

Lateral high-voltage devices using an optimized variational lateral dopingCHEN, X. B; MAWBY, P. A; SALAMA, C. A. T et al.International journal of electronics. 1996, Vol 80, Num 3, pp 449-459, issn 0020-7217Article

Analysis of the quasi-saturation region of high voltage VDMOS devicesREBOLLO, J; FIGUERAS, E; MILLAN, J et al.Solid-state electronics. 1987, Vol 30, Num 2, pp 177-180, issn 0038-1101Article