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Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scalingCHABINI, Noureddine; WOLF, Wayne.IEEE transactions on very large scale integration (VLSI) systems. 2004, Vol 12, Num 6, pp 573-589, issn 1063-8210, 17 p.Article

Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraintsCHABINI, Noureddine; WOLF, Wayne.IEEE transactions on very large scale integration (VLSI) systems. 2005, Vol 13, Num 10, pp 1113-1126, issn 1063-8210, 14 p.Article

An asynchronous distributed approach for the simulation of behavior-level models on parallel processorsGHOSH, S; MENG-LIN YU.IEEE transactions on parallel and distributed systems. 1995, Vol 6, Num 6, pp 639-652, issn 1045-9219Article

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