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ti.\*:("Electrical\/electrostatic discharge symposium")

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on chip ESD protection using SCR pairsCROFT, G. D.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 177-197, issn 0304-3886Conference Paper

Annealing of ESD-induced damage in power MOSFETsZUPAC, D; POTE, D; SCHRIMPF, R. D et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 131-144, issn 0304-3886Conference Paper

From lightning to charged-device model electrostatic dischargesLIN, D. L; WELSHER, T. L.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 199-213, issn 0304-3886Conference Paper

An investigation of BiCMOS ESD protection circuit elements and applications in submicron technologiesAMERASEKERA, A; CHATTERJEE, A.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 145-160, issn 0304-3886Conference Paper

ESD induced gate oxide damage during wafer fabrication processKIM, S. U.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 323-337, issn 0304-3886Conference Paper

Shallow trench isolation double-diode electrostatic discharge circuit and interaction with DRAM output circuitryVOLDMAN, S. H; GROSS, V. P; HARGROVE, M. J et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 237-262, issn 0304-3886Conference Paper

The resistive phase of an air discharge and the formation of fast risetime ESD pulsesHYATT, H. M.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 339-356, issn 0304-3886Conference Paper

A successful HBM ESD protection circuit for micron and sub-micron level CMOSCARBAJAL, B. G; CLINE, R. A; ANDRESEN, B. H et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 301-312, issn 0304-3886Conference Paper

Latent damage and parametric drift in electrostatically damaged MOS transistorsTUNNICLIFFE, M. J; DWYER, V. M; CAMPBELL, D. S et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 91-110, issn 0304-3886Conference Paper

Experimental study of unprotected MOS structures under EOS/ESD conditionsGREASON, W. D; CHUM, K.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 281-300, issn 0304-3886Conference Paper

ESD protection in a 3.3 V sub-micron silicided CMOS technologyKRAKAUER, D.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 111-129, issn 0304-3886Conference Paper

Fieldemitter-based ESD-protection circuits for high-frequency devices and IC'sBOCK, K; HARTNAGEL, H.-L.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 263-279, issn 0304-3886Conference Paper

Integrated circuit metal in the charged device model: bootstrap heating, melt damage, and scaling lawsMALONEY, T. J.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 313-321, issn 0304-3886Conference Paper

Techniques and methodologies for making system level ESD response measurements for troubleshooting or design verificationSMITH, D. C.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 215-235, issn 0304-3886Conference Paper

electrical overstress (EOS) power profiles: a guideline to qualify EOS hardness of semiconductor devicesDIAZ, C; SUNG-MO KANG; DUVVURY, C et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 161-176, issn 0304-3886Conference Paper

A newsly observed high frequency effect on the ESD protection utilized in a gigahertz NMOS technologyWESTON, H. T; LEE, V. W; STANIK, T. D et al.Journal of electrostatics. 1993, Vol 31, Num 2-3, pp 79-89, issn 0304-3886Conference Paper

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