Automated Physical Modeling of Nonlinear Audio Circuits for Real-Time Audio Effects—Part II: BJT and Vacuum Tube ExamplesYEH, David T.IEEE transactions on audio, speech, and language processing. 2012, Vol 20, Num 4, pp 1207-1216, issn 1558-7916, 10 p.Article

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness AsymmetryJANDHYALA, Srivatsava; KASHYAP, Rutwick; ANGHEL, Costin et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 4, pp 1002-1007, issn 0018-9383, 6 p.Article

HiSIM-IGBT: A Compact Si-IGBT Model for Power Electronic Circuit Design : ADVANCED MODELING OF POWER DEVICES AND THEIR APPLICATIONSMIYAKE, Masataka; NAVARRO, Dondee; FELDMANN, Uwe et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 2, pp 571-579, issn 0018-9383, 9 p.Article

Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFETJANDHYALA, Srivatsava; ABRAHAM, Aby; ANGHEL, Costin et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 7, pp 1974-1979, issn 0018-9383, 6 p.Article

A compact model of the pinch-off region of 100 nm MOSFETs based on the surface-potentialNAVARRO, Dondee; MIZOGUCHI, Takeshi; NAKAYAMA, Noriaki et al.IEICE transactions on electronics. 2005, Vol 88, Num 5, pp 1079-1086, issn 0916-8524, 8 p.Article

Electro-thermal coupling analysis methodology for RF circuitsGOMEZ, Didac; MATEO, Diego; ALTET, Josep et al.International workshop on thermal investigations of ICs and systems. 2010, pp 154-159, isbn 978-2-35500-012-6, 1Vol, 6 p.Conference Paper

Periodic steady state computation with the Poincaré-map methodHOUBEN, S. H. M. J.International series of numerical mathematics. 2003, pp 101-119, issn 0373-3149, isbn 3-7643-2192-X, 19 p.Conference Paper

Combinatorial Algorithms for Fast Clock Mesh OptimizationVENKATARAMAN, Ganesh; ZHUO FENG; JIANG HU et al.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 1, pp 131-141, issn 1063-8210, 11 p.Article

A new analytic approximation to general diode equationJIN HE; MING FANG; BO LI et al.Solid-state electronics. 2006, Vol 50, Num 7-8, pp 1371-1374, issn 0038-1101, 4 p.Article

The influence of parasitic effects on injection-level-dependent lifetime dataCHEN, Florence W; COTTER, Jeffrey E; ABBOTT, Malcolm D et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 11, pp 2960-2968, issn 0018-9383, 9 p.Article

A Memristor SPICE Implementation and a New Approach for Magnetic Flux-Controlled Memristor ModelingBATAS, Daniel; FIEDLER, Horst.IEEE transactions on nanotechnology. 2011, Vol 10, Num 2, pp 250-255, issn 1536-125X, 6 p.Article

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTSLORENZ, Jürgen K; BAR, Eberhard; CLEES, Tanja et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 8, pp 2218-2226, issn 0018-9383, 9 p.Article

Partitioned Latency Insertion Method with a Generalized Stability CriteriaGOH, Patrick; SCHUTT-AINE, Jose E; KLOKOTOV, Dmitri et al.IEEE transactions on components, packaging, and manufacturing technology (2011. Print). 2011, Vol 1, Num 9-10, pp 1447-1455, issn 2156-3950, 9 p.Article

Experimental verification of the smoothie database model for third and fifth order intermodulation distortionCUOCO, Vittorio; HEIJDEN, M. P. V. D; PELK, M et al.ESSCIRC 2002 : European solid-state circuits conferenceEuropean solid-state device research conference. 2002, pp 635-638, isbn 88-900847-8-2, 4 p.Conference Paper

Inductance formulas adapted for direct use in Spice simulatorsUNTERWEISSACHER, M; BRANDTNER, T; MERTENS, K et al.Electronics Letters. 2008, Vol 44, Num 2, pp 92-94, issn 0013-5194, 3 p.Article

On the modeling of semiconductor quantum effects for circuit simulationFELGENHAUER, Frank; FABEL, Simon; MATHIS, Wolfgang et al.IEEE conference on nanotechnology. 2004, pp 213-215, isbn 0-7803-8536-5, 1Vol, 3 p.Conference Paper

Including spatial correlations of channel length and threshold voltage variation in circuit simulationsWATTS, Josef; TROMBLEY, Henry.Microelectronics and reliability. 2012, Vol 52, Num 8, pp 1571-1574, issn 0026-2714, 4 p.Conference Paper

Switched-capacitor cyclic DAC with mismatch charge compensationLEE, K. S; LEE, Y. M.Electronics letters. 2010, Vol 46, Num 13, pp 902-903, issn 0013-5194, 2 p.Article

VHDL simulation of magnetic domain wall logicKLEIN, Jacques-Olivier; BELHAIRE, Eric; CHAPPERT, Claude et al.IEEE transactions on magnetics. 2006, Vol 42, Num 10, pp 2754-2756, issn 0018-9464, 3 p.Conference Paper

Highly linear transconductance topology using floating transistorsZARE-HOSEINI, H; KALE, I; MORLING, C. S et al.Electronics Letters. 2006, Vol 42, Num 1, pp 2-4, issn 0013-5194, 3 p.Article

Quasi-static adiabatic logic 2N-2N2P2D familyHE, Y; TIAN, J; TAN, X et al.Electronics Letters. 2006, Vol 42, Num 16, pp 905-907, issn 0013-5194, 3 p.Article

Circuit simulation for gas metal arc welding systemTERASAKI, H; SIMPSON, S. W.MWSCAS : Midwest symposium on circuits and systems. 2004, isbn 0-7803-8346-X, 3Vol, Vol III, 387-390Conference Paper

An efficient surface potential solution algorithm for compact MOSFET modelsRIOS, Rafael; MUDANAI, Sivakumar; SHIH, Wei-Kai et al.International Electron Devices Meeting. 2004, pp 755-758, isbn 0-7803-8684-1, 1Vol, 4 p.Conference Paper

Analytical transient response of MOS current mirrorsKAYSSI, Ayman.International journal of circuit theory and applications. 2003, Vol 31, Num 5, pp 453-464, issn 0098-9886, 12 p.Article

Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100 nm SOC Circuit DesignSADACHIKA, Norio; MIMURA, Shu; YUMISAKI, Akihiro et al.IEICE transactions on electronics. 2011, Vol 94, Num 3, pp 361-367, issn 0916-8524, 7 p.Article