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Results 1 to 25 of 869

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Floorplan-aware analog IC sizing and optimization based on topological constraintsLOURENCO, Nuno; CANELAS, António; POVOA, Ricardo et al.Integration (Amsterdam). 2015, Vol 48, pp 183-197, issn 0167-9260, 15 p.Article

Reliability assessment of CMOS differential cross-coupled LC oscillators and a novel on chip self-healing approach against aging phenomenaAFACAN, Engin; DUNDAR, Gunhan; BASKAYA, Faik et al.Microelectronics and reliability. 2014, Vol 54, Num 2, pp 397-403, issn 0026-2714, 7 p.Article

2-D Compact Model for Drain Current of Fully Depleted Nanoscale GeOI MOSFETs for Improved Analog Circuit DesignMONDAL, Chandrima; BISWAS, Abhijit.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 8, pp 2525-2531, issn 0018-9383, 7 p.Article

A Compact a-IGZO TFT Model Based on MOSFET SPICE Level = 3 Template for Analog/RF Circuit DesignsPERUMAL, Charles; ISHIDA, Koichi; SHABANPOUR, Reza et al.IEEE electron device letters. 2013, Vol 34, Num 11, pp 1391-1393, issn 0741-3106, 3 p.Article

A Study of Dielectric Relaxation and Capacitance Matching of Al2O3/HfO2/Al2O3 MIM CapacitorsHAN, In-Shik; KWON, Hyuk-Min; KWON, Sung-Kyu et al.IEEE electron device letters. 2013, Vol 34, Num 10, pp 1223-1225, issn 0741-3106, 3 p.Article

Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETsDE SOUZA, Michelly; PAZ, Bruna Cardoso; FLANDRE, Denis et al.Microelectronics and reliability. 2013, Vol 53, Num 6, pp 848-855, issn 0026-2714, 8 p.Article

IGZO TFT-Based All-Enhancement Operational Amplifier Bent to a Radius of 5 mmZYSSET, Christoph; MÜNZENRIEDER, Niko; PETTI, Luisa et al.IEEE electron device letters. 2013, Vol 34, Num 11, pp 1394-1396, issn 0741-3106, 3 p.Article

A High Voltage Self-Biased Integrated DC-DC Buck Converter With Fully Analog MPPT Algorithm for Electrostatic Energy HarvestersSTANZIONE, Stefano; VAN LIEMPD, Chris; VAN SCHAIJK, Rob et al.IEEE journal of solid-state circuits. 2013, Vol 48, Num 12, pp 3002-3010, issn 0018-9200, 9 p.Conference Paper

Multiplexing Techniques of Single Flux Quantum Circuit Based Readout Circuit for a Multi-Channel Sensing SystemAOKI, K; YAMANASHI, Y; YOSHIKAWA, N et al.IEEE transactions on applied superconductivity. 2013, Vol 23, Num 3, issn 1051-8223, 2500204.1-2500204.4, 1Conference Paper

Robust low leakage controlled keeper by current-comparison domino for wide fan-in gatesPEIRAVI, Ali; ASYAEI, Mohammad.Integration (Amsterdam). 2012, Vol 45, Num 1, pp 22-32, issn 0167-9260, 11 p.Article

A 1.2 V, 0.87-3.7 GHz Wideband Low-Noise Mixer Using a Current Mirror for Multiband ApplicationDAEHOON NA; TAE WOOK KIM.IEEE microwave and wireless components letters. 2012, Vol 22, Num 2, pp 91-93, issn 1531-1309, 3 p.Article

Field Plate Optimization in Low-Power High-Gain Source-Gated TransistorsSPOREA, Radu A; TRAINOR, Michael J; YOUNG, Nigel D et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 8, pp 2180-2186, issn 0018-9383, 7 p.Article

Layout-Aware Variability Characterization of CMOS Current Sources : Solid-State Circuit Design -Architecture, Circuit, Device and Design MethodologyLIU, Bo; YANG, Bo; NAKATAKE, Shigetoshi et al.IEICE transactions on electronics. 2012, Vol 95, Num 4, pp 696-705, issn 0916-8524, 10 p.Article

Three-dimensional thermal investigations at board level in a reflow oven using thermal-coupling methodLAU, Chun-Sean; ABDULLAH, M. Z; CHE ANI, F et al.Soldering & surface mount technology. 2012, Vol 24, Num 3, pp 167-182, issn 0954-0911, 16 p.Article

N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit ApplicationsNA, Kee-Yeol; BAEK, Ki-Ju; KIM, Yeong-Seuk et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 12, pp 3273-3279, issn 0018-9383, 7 p.Article

A current-mode multi-valued adder circuit for multi-operand additionCINI, Ugur; MORGÜL, Avni.International journal of electronics. 2011, Vol 98, Num 4-6, pp 735-751, issn 0020-7217, 17 p.Article

An Electrically Adjustable 3-Terminal Regulator for Post-Fabrication Level-Trimming with a Reliable 1-Wire Serial I/O : Analog CIrcuits and Related SoC Integration TechnologiesMORIMOTO, Hiroyuki; KOIKE, Hiroki; NAKAMURA, Kazuyuki et al.IEICE transactions on electronics. 2011, Vol 94, Num 6, pp 945-952, issn 0916-8524, 8 p.Article

Design and implementation of monostable multivibrators employing differential voltage current conveyorsCHIEN, Hung-Chun; LO, Yu-Kang.Microelectronics journal. 2011, Vol 42, Num 10, pp 1107-1115, issn 0959-8324, 9 p.Article

Formal verification of bond graph modelled analogue circuitsDENMAN, W; ZAKI, M. H; TAHAR, S et al.IET circuits, devices & systems (Print). 2011, Vol 5, Num 3, pp 243-255, issn 1751-858X, 13 p.Article

Four-quadrant analogue multiplier using operational amplifierRIEWRUJA, Vanchai; RERKRATN, Apinai.International journal of electronics. 2011, Vol 98, Num 4-6, pp 459-474, issn 0020-7217, 16 p.Article

Mixed-Signal Organic Integrated Circuits in a Fully Photolithographic Dual Threshold Voltage TechnologyNAUSIEDA, Ivan; KYUNGBUM RYU, Kevin; DA HE, David et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 3, pp 865-873, issn 0018-9383, 9 p.Article

Electrical Performance Optimization of Nanoscale Double-Gate MOSFETs Using Multiobjective Genetic AlgorithmsBENDIB, Toufik; DJEFFAL, Fayçal.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 11, pp 3743-3750, issn 0018-9383, 8 p.Article

Study of the impact of hot carrier injection to immunity of MOSFET to electromagnetic interferencesLI, B; BERBEL, N; BOYER, A et al.Microelectronics and reliability. 2011, Vol 51, Num 9-11, pp 1557-1560, issn 0026-2714, 4 p.Conference Paper

Compact trajectory-based behavioural models for analogue circuitsDE JONGHE, D; GIELEN, G.Electronics letters. 2010, Vol 46, Num 15, pp 1058-1060, issn 0013-5194, 3 p.Article

Electronically tunable first-order all-pass circuit employing DVCC and OTATSUKUTANI, Takao; TSUNETSUGU, Hideki; SUMI, Yasuaki et al.International journal of electronics. 2010, Vol 97, Num 3-4, pp 285-293, issn 0020-7217, 9 p.Article

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