kw.\*:("Accès mémoire")
Results 1 to 25 of 1562
Selection :
Conception et réalisation d'un microprocesseur VLIW: Architecture interne = Design and realisation of a VLIW microprocessor: Internal architectureWajsburt, Franck; Greiner, A.1995, 205 p.Thesis
Cache-DASD storage design for improving system performanceGROSSMAN, C. P.IBM systems journal. 1985, Vol 24, Num 3-4, pp 316-334, issn 0018-8670Article
A comparative analysis of dependence testing mechanismsHOEFLINGER, Jay; PAEK, Yunheung.Lecture notes in computer science. 2001, pp 289-303, issn 0302-9743, isbn 3-540-42862-3Conference Paper
Client-side component caching: A flexible mechanism for optimized component attribute cachingPOHL, Christoph; SCHILL, Alexander.Lecture notes in computer science. 2003, pp 141-152, issn 0302-9743, isbn 3-540-20529-2, 12 p.Conference Paper
Accessing sparse arrays in parallel memoriesBANERJEE, U; GAJSKI, D; KUCK, D et al.Journal of VLSI and computer systems. 1983, Vol 1, Num 1, pp 69-100, issn 0733-5644Article
Exploiting shared scratch pad memory space in embedded multiprocessor systemsKANDEMIR, Mahmut; RAMANUJAM, J; CHOUDHARY, A et al.Design automation conference. 2002, pp 219-224, isbn 1-58113-461-4, 6 p.Conference Paper
Reducing the read-miss penalty for flat coma protocolsDAHLGREN, F; STENSTRÖM, P; BJÖRKMAN, M et al.Computer journal (Print). 1997, Vol 40, Num 4, pp 208-219, issn 0010-4620Article
Hashed addressed caches for embedded pointer based codesSTANCA, M; VASSILIADIS, S; COTOFANA, S et al.Lecture notes in computer science. 2000, pp 965-968, issn 0302-9743, isbn 3-540-67956-1Conference Paper
Design and evaluation of multikey access methods using signature filesJAE WOO CHANG; YOON JOON LEE.Microprocessing and microprogramming. 1991, Vol 33, Num 1, pp 9-19, issn 0165-6074Article
Axioms for memory access in asynchronous hardware systemsMISRA, J.ACM transactions on programming languages and systems. 1986, Vol 8, Num 1, pp 142-153, issn 0164-0925Article
Analysis of interleaved storage via a constant-service queuing system with Markov-chaindriven inputHOFRI, M.Journal of the Association for Computing Machinery. 1984, Vol 31, Num 3, pp 628-648, issn 0004-5411Article
Pseudo-vectorizing compiler for the SR8000NISHIYAMA, H; MOTOKAWA, K; KYUSHIMA, I et al.Lecture notes in computer science. 2000, pp 1023-1027, issn 0302-9743, isbn 3-540-67956-1Conference Paper
A toxonomy-based comparison of several distributed shared memory systemsMING-CHIT TAM; SMITH, J. M; FARBER, D. J et al.Operating systems review. 1990, Vol 24, Num 3, pp 40-67, issn 0163-5980, 28 p.Article
An upper bound on buffer size for join operation using nonclustered indexesJAE MOON LEE; JONG SOO PARK; MYUNGHWAN KIM et al.Information processing letters. 1990, Vol 36, Num 2, pp 85-90, issn 0020-0190, 6 p.Article
Mitro : virual specification of securityHEYDON, A; MAIMONE, M. W; TYGAR, J. D et al.IEEE transactions on software engineering. 1990, Vol 16, Num 10, pp 1185-1197, issn 0098-5589, 13 p.Article
Speculative dynamic vectorizationPAJUELO, Alex; GONZALEZ, Antonio; VALERO, Mateo et al.Proceedings - International Symposium on Computer Architecture. 2002, pp 271-280, issn 1063-6897, isbn 0-7695-1605-X, 10 p.Conference Paper
Policy engine : A framework for authorization, accounting policy specification and evaluation in gridsSUNDARAM, Babu; CHAPMAN, Barbara M.Lecture notes in computer science. 2001, pp 145-153, issn 0302-9743, isbn 3-540-42949-2Conference Paper
Exploiting contemporary memory techniques in reconfigurable acceleratorsHARTENSTEIN, R. W; HERZ, M; HOFFMANN, T et al.Lecture notes in computer science. 1998, pp 189-198, issn 0302-9743, isbn 3-540-64948-4Conference Paper
Conditions and consequences of maintenance rehearsalWIXTED, J. T.Journal of experimental psychology. Learning, memory, and cognition. 1991, Vol 17, Num 5, pp 963-973, issn 0278-7393Article
800 Ms/s arbitrary function generatorGYLES, C.IEEE transactions on instrumentation and measurement. 1990, Vol 39, Num 1, pp 96-100, issn 0018-9456Article
Vector access performance in parallel memories using a skewed storage schemeHARPER, D. T. III; JUMP, J. R.IEEE transactions on computers. 1987, Vol 36, Num 12, pp 1440-1449, issn 0018-9340Article
IP address lookup with the visualizable biased segment treeLEE, Inbok; MUN, Jeong-Shik; KIM, Sung-Ryul et al.Lecture notes in computer science. 2005, issn 0302-9743, isbn 3-540-28312-9, 2Vol, Part I, 1137-1140Conference Paper
Redundant arithmetic optimizationsYEH, T. Y; HONG WANG.Lecture notes in computer science. 2000, pp 984-988, issn 0302-9743, isbn 3-540-67956-1Conference Paper
The filter data cache: A tour management comparison with related split data cache schemes sensitive to data localitiesSAHUQUILLO, Julio; PONT, Ana; MILUTINOVIC, Veljko et al.Lecture notes in computer science. 2000, pp 319-327, issn 0302-9743, isbn 3-540-41128-3Conference Paper
Simulated performance of a RISC-based multiprocessor using orthogonal-access memoryKAI HWANG; CHIEN-MING CHENG.Journal of parallel and distributed computing (Print). 1991, Vol 13, Num 1, pp 43-57, issn 0743-7315Article