Pascal and Francis Bibliographic Databases

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Results 1 to 25 of 814

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Pipelined carry look-ahead adderCRAWLEY, D. G; AMARATUNGA, G. A. J.Electronics Letters. 1986, Vol 22, Num 12, pp 661-662, issn 0013-5194Article

A fast and area efficient complementary pass-transistor logic carry-skip adderSTROLLO, A. G. M; NAPOLI, E.International conference on microelectronic. 1997, pp 701-704, isbn 0-7803-3664-X, 2VolConference Paper

A reduced-area scheme for carry-select addersTYAGI, A.IEEE transactions on computers. 1993, Vol 42, Num 10, pp 1163-1170, issn 0018-9340Article

Parity predictor for shifting-output addersVASSILIADIS, S; PUTRINO, M; SCHWARZ, E. M et al.Electronics Letters. 1989, Vol 25, Num 6, pp 422-424, issn 0013-5194, 3 p.Article

Two's complement division without using the set of full precision comparisonsBASHAGHA, A. E; IBRAHIM, M. K.IEE proceedings. Computers and digital techniques. 1998, Vol 145, Num 1, pp 19-26, issn 1350-2387Article

Carry-save adders for computing the product AB modulo NKOC, C. K; HUNG, C. Y.Electronics Letters. 1990, Vol 26, Num 13, pp 899-900, issn 0013-5194, 2 p.Article

A formald HDL and its use in the FM9001 verificationHUNT, W. A; BROCK, B. C.Philosophical transactions-Royal Society of London. Physical sciences and engineering. 1992, Vol 339, Num 1652, pp 35-47, issn 0962-8428Article

An optoelectronic adderMACDONALD, R. I.Proceedings of the IEEE. 1986, Vol 74, Num 11, pp 1593-1595, issn 0018-9219Article

A way to built efficient carry skip addersHOCHET, B; MULLER, J. M.Rapport de recherche - Informatique et mathématiques appliquées de Grenoble, ISSN: 0750-7380 ; 583. 1986, 14 p.Report

An adder design optimized for DCS logicWEINBERGER, A.IBM journal of research and development. 1991, Vol 35, Num 3, pp 352-356, issn 0018-8646Article

A high-speed multiplier using a redundant binary adder treeHARATA, Y; NAKAMURA, Y; NAGASE, H et al.IEEE journal of solid-state circuits. 1987, Vol 22, Num 1, pp 28-34, issn 0018-9200Article

A real-time all-optical half-adder based on vector wave interferometryAJAY GHOSH; MURATA, K.Optik (Stuttgart). 1988, Vol 80, Num 3, pp 124-128, issn 0030-4026Article

Adding obliquely crossed spherocylindrical powers : a nonproblem. Author's replyHARRIS, W. F; DE FARIA E SOUSA, S. J.Ophthalmic & physiological optics. 1996, Vol 16, Num 3, pp 267-269, issn 0275-5408Conference Paper

A fast-carry adder with CMOS transmission gatesFENWICK, P. M.Computer journal (Print). 1987, Vol 30, Num 1, pp 77-79, issn 0010-4620Article

A full adder using junction charge-coupled logicVAN DER KLAUW, C. M.IEEE journal of solid-state circuits. 1986, Vol 21, Num 4, pp 584-587, issn 0018-9200Article

Multi-beam TWT with active power combiningLI GAN; MO, Y.-L; LIU, S.-G et al.International journal of electronics. 1998, Vol 84, Num 6, pp 647-657, issn 0020-7217Article

The flagged prefix adder for dual additionsBURGESS, N.SPIE proceedings series. 1998, pp 567-575, isbn 0-8194-2916-3Conference Paper

Efficient testing of optimal time addersBECKER, B.IEEE transactions on computers. 1988, Vol 37, Num 9, pp 1113-1121, issn 0018-9340Article

A pipelined binary coded decimal adder using the residue number systemADEGBENRO, O; SALAWU, R. I.International journal of electronics. 1987, Vol 62, Num 2, pp 209-217, issn 0020-7217Article

An upper bound for codes for the noisy two-access binary adder channelVAN TILBORG, H. C. A.IEEE transactions on information theory. 1986, Vol 32, Num 3, pp 436-440, issn 0018-9448Article

Addition de puissance de deux diodes Gunn en technologie quasi-optique en bande Ka = Ka band quasi-optical technology power adder for two Gunn diodesCAM, H; DESCHAMPS, B; BOURREAU, D et al.Journées nationales microondes. 1997, pp 300-301, 2VolConference Paper

Multi-operand modulo addition using carry save addersKOC, C. K; HUNG, C. Y.Electronics Letters. 1990, Vol 26, Num 6, pp 361-363, issn 0013-5194, 3 p.Article

A diagonal address generator for a Josephson memory circuitSUZUKI, H; HASUO, S.IEEE journal of solid-state circuits. 1987, Vol 22, Num 1, pp 92-97, issn 0018-9200Article

Direct two's-complement algorithm for XY±ZVASSILIADIS, S; PUTRINO, M; SWARTZ, E et al.Electronics Letters. 1987, Vol 23, Num 10, pp 538-540, issn 0013-5194Article

Logical effort of higher valency addersHARRIS, David.Asilomar Conference on Signals, Systems & Computers. 2004, isbn 0-7803-8622-1, 2Vol, vol 2, 1358-1362Conference Paper

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