Pascal and Francis Bibliographic Databases

Help

Search results

Your search

kw.\*:("Array processor")

Document Type [dt]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Publication Year[py]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Discipline (document) [di]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Language

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Author Country

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Results 1 to 25 of 571

  • Page / 23
Export

Selection :

  • and

Design and programming of logic processors for SIMD arraysDVORAK, V.Computers and artificial intelligence. 1987, Vol 6, Num 2, pp 181-190, issn 0232-0274Article

Parallel sorting with cooperating heaps in a linear array of processorsLIN, Y.-C; LIN, F.-C.Parallel computing. 1990, Vol 16, Num 2-3, pp 273-278, issn 0167-8191, 6 p.Article

On time mapping of uniform dependence algorithms into lower dimensional processor arraysWEIJIA SHANG; FORTES, J. A. B.IEEE transactions on parallel and distributed systems. 1992, Vol 3, Num 3, pp 350-363Article

Design of array processor software for nonlinear structural analysisSARIGUL, N; JIN, M; KOLAR, R et al.Computers & structures. 1985, Vol 20, Num 6, pp 963-974, issn 0045-7949Article

Connecting the maximum number of nodes in the grid to the boundary with nonintersecting line segmentsPALIOS, L.Journal of algorithms (Print). 1997, Vol 22, Num 1, pp 57-92, issn 0196-6774Article

Réseaux arithmétiques pour réseaux d'interconnexion = Lattices for interconnection networksGarcia, Christine; Bermond, Jean-Claude.1993, 119 p.Thesis

An efficient array processor for accurate downdating of ULV decompositionYOON, Peter A; SIBUL, Leon H.SPIE proceedings series. 2001, pp 262-272, isbn 0-8194-4188-0Conference Paper

Finding maximum on an array processor with a global busBOKHARI, S. H.IEEE transactions on computers. 1984, Vol 33, Num 2, pp 133-139, issn 0018-9340Article

A design of ABC95 array computer multi-function interconnection ChipsJI ZHENZHOU; ZHANG HONGTAO; FANG BINXING et al.High technology letters. 2002, Vol 8, Num 1, pp 12-16, issn 1006-6748Article

Integer sorting on a mesh-connected array of processorsKRIZANC, D.Information processing letters. 1993, Vol 47, Num 6, pp 283-289, issn 0020-0190Article

An architecture for high-speed scientific calculation-oriented data flow machineTAKAHASHI, N; AMAMIYA, M.Review of the electrical communication laboratories. 1984, Vol 32, Num 5, pp 783-792, issn 0029-067XArticle

Modular matrix multiplication on a linear arrayRAMAKRISHNAN, I. V; VARMAN, P. J.IEEE transactions on computers. 1984, Vol 33, Num 11, pp 952-958, issn 0018-9340Article

Architectural improvements for a Data-Driven VLSI processing arrayWEISS, S; SPILLINGER, I. Y; SILBERMAN, G. M et al.Journal of parallel and distributed computing (Print). 1993, Vol 19, Num 4, pp 308-322, issn 0743-7315Article

The ring array processor : a multiprocessing peripheral for connectionist applicationsMORGAN, N; BECK, J; KOHN, P et al.Journal of parallel and distributed computing (Print). 1992, Vol 14, Num 3, pp 248-259, issn 0743-7315Article

Fast execution of loops with IF statementsBANERJEE, U; GAJSKI, D. D.IEEE transactions on computers. 1984, Vol 33, Num 11, pp 1030-1033, issn 0018-9340Article

Image processing with VLSICORRY, A. G; ARVIND, D. K; CONNOLLY, G. L. S et al.Microprocessors and microsystems. 1983, Vol 7, Num 10, pp 482-486, issn 0141-9331Article

A Novel Architecture for Block Interleaving Algorithm in MB-OFDM Using Mixed Radix SystemHAN, Youngsun; HARLIMAN, Peter; SEON WOOK KIM et al.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 6, pp 1020-1024, issn 1063-8210, 5 p.Article

Optimal decomposition of convex morphological structuring elements for 4-connected parallel array processorsHOCHONG PARK; CHIN, R. T.IEEE transactions on pattern analysis and machine intelligence. 1994, Vol 16, Num 3, pp 304-313, issn 0162-8828Article

Deriving algorithms on reconfigurable networks based on function decompositionGEN-HUEY CHEN; BIING-FENG WANG; HUNGWEN LI et al.Theoretical computer science. 1993, Vol 120, Num 2, pp 215-227, issn 0304-3975Article

Efficient processor allocation strategies for mesh-connected parallel computersYAHUI ZHU.Journal of parallel and distributed computing (Print). 1992, Vol 16, Num 4, pp 328-337, issn 0743-7315Article

A guide to sorting on the mesh-connected processor arrayCHLEBUS, B. S; KUKAWKA, M.Computers and artificial intelligence. 1990, Vol 9, Num 6, pp 599-610, issn 0232-0274, 12 p.Article

Digital convolution filtering techniques on an array processor for particle image velocimetryGRANT, I; JIAN HANG QIU.Applied optics. 1990, Vol 29, Num 29, pp 4327-4329, issn 0003-6935Article

Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arraysERDÖS, P; KOREN, I; MORAN, S et al.Mathematical systems theory. 1988, Vol 21, Num 2, pp 85-98, issn 0025-5661Article

A shape coding arrayWOJCIK, Z. M; ROSENFELD, A.Pattern recognition letters. 1986, Vol 4, Num 1, pp 57-59, issn 0167-8655Article

Tree-adjoining language parsing in o(n6) timeRAJASEKARAN, S.SIAM journal on computing (Print). 1996, Vol 25, Num 4, pp 862-873, issn 0097-5397Article

  • Page / 23