Pascal and Francis Bibliographic Databases

Help

Search results

Your search

kw.\*:("Asynchronous circuit")

Document Type [dt]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Publication Year[py]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Discipline (document) [di]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Language

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Author Country

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Results 1 to 25 of 356

  • Page / 15
Export

Selection :

  • and

10th international symposium on asynchronous circuits and systems (ASYNC 2004)International symposium on asynchronous circuits and systems. 2004, isbn 0-7695-2133-9, 1Vol, XII-251 p, isbn 0-7695-2133-9Conference Proceedings

Experimental observation of simultaneous asynchronous oscillation in an oscillator containing an idler circuit and two resonatorsIIDA, Y; MORITA, M.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1984, Vol 67, Num 7, pp 371-372, issn 0387-236XArticle

Base minimale de réalisation des circuits séquentielsTSIRLIN, B. S.Izvestiâ Akademii nauk SSSR. Tehničeskaâ kibernetika. 1985, Num 2, pp 91-97, issn 0002-3388Article

Processus asynchrones et circuits de commande antitoniques. II. Propriétés fondamentalesSTARODUBTSEV, N. A.Izvestiâ Akademii nauk SSSR. Tehničeskaâ kibernetika. 1985, Num 4, pp 115-122, issn 0002-3388Article

O MOZLIWOSCI OSLABIENIA WARUNKOW NA BRAK WYSCIGOW KRYTYCZNYCH W UKLADACH ASYNCHRONICZNYCH Z PRZERZUTNIKAMI = POSSIBILITE D'ABAISSER LES CONTRAINTES DUES AU MANQUE DE CHEMIN DANS LES CIRCUITS ASYNCHRONES AVEC FLIP-FLOPSSOSNOWSKI J.1979; ARCH. AUTOMAT. TELEMECH.; POL; DA. 1979; VOL. 24; NO 2; PP. 273-282; ABS. RUS/ENG; BIBL. 20 REF.Article

DAS FEHLVERHALTEN VON FLIPFLOPS BEI ASYNCHRONEM BETRIEB. = LE COMPORTEMENT DEFECTUEUX DE BASCULES EN CAS DE FONCTIONNEMENT ASYNCHRONEWOLF G.1977; FREQUENZ; DTSCH.; DA. 1977; VOL. 31; NO 3; PP. 71-76; ABS. ANGL.; BIBL. 4 REF.Article

Laying out circuits on asynchronous cellular arrays: a step towards feasible nanocomputers?PEPER, Ferdinand; JIA LEE; ADACHI, Susumu et al.Nanotechnology (Bristol. Print). 2003, Vol 14, Num 4, pp 469-485, issn 0957-4484, 17 p.Article

A state assignment approach to asynchronous CMOS circuit designKANTABUTRA, V; ANDREOU, A. G.IEEE transactions on computers. 1994, Vol 43, Num 4, pp 460-469, issn 0018-9340Article

Two new types of hazard in asynchronous circuitsANDREW, R.Electronics Letters. 1985, Vol 21, Num 21, pp 1001-1002, issn 0013-5194Article

A tabular method for guard strengthening, symmetrization, and operator reduction for Martin's asynchronous design methodologyTABRIZI, N; LIEBELT, M. J; ESHRAGHIAN, K et al.IEEE transactions on computers. 1997, Vol 46, Num 9, pp 1050-1054, issn 0018-9340Article

Asynchronous modular arbiterCALVO, J; ACHA, J. I; VALENCIA, M et al.IEEE transactions on computers. 1986, Vol 35, Num 1, pp 67-70, issn 0018-9340Article

Two new types of hazard in asynchronous circuits. Comment and replyCHOW, C. N; ANDREW, R.Electronics Letters. 1986, Vol 22, Num 25, pp 1319-1320, issn 0013-5194Article

Déchiffrement des résultats d'expérience de diagnostic sur un dispositif asynchrone avec mémoireTARGAMADZE, A. EH.Avtomatika i telemehanika. 1984, Num 2, pp 133-142, issn 0005-2310Article

Coherent design of asynchronous circuitsVINGRON, P.IEE proceedings. Part E. Computers and digital techniques. 1983, Vol 130, Num 6, pp 190-202, issn 0143-7062Article

A MASKED-FAULT-FREE REALIZATION OF FAIL-SAFE ASYNCHRONOUS SEQUENTIAL CIRCUITS.MUKAI Y; TOHMA Y.1976; IN: F.T.C.S. 6. 1976 INT. SYMP. FAULT-TOLERANT COMPUT.; PITTSBURGH, PA.; 1976; LONG BEACH; INST. ELECTR. ELECTRON. ENG.; DA. 1976; PP. 69-74; BIBL. 16 REF.Conference Paper

DIRECT IMPLEMENTATION OF ASYNCHRONOUS CONTROL UNITSHOLLAAR LA.1982; IEEE TRANSACTIONS ON COMPUTERS; ISSN 0018-9340; USA; DA. 1982; VOL. 31; NO 12; PP. 1133-1141; BIBL. 21 REF.Article

KRS- UND ESER-TECHNIK FUER DIE PRUEFUNG DIGITALER SCHALTUNGEN = KRS ET ESER TECHNIQUE POUR L'ESSAI DE CIRCUITS NUMERIQUESHERMANN L; WERRMANN G.1981; FEINGERAETETECHNIK; ISSN 0014-9683; DDR; DA. 1981; VOL. 30; NO 5; PP. 219-221; BIBL. 1 REF.Article

Asynchronous sigma―delta modulator with noise shapingWEI CHEN; PAPAVASSILIOU, C.Electronics letters. 2013, Vol 49, Num 24, pp 1520-1522, issn 0013-5194, 3 p.Article

Concurrent implementation of asynchronous transition systemsVOGLER, W.Lecture notes in computer science. 1999, pp 284-303, issn 0302-9743, isbn 3-540-66132-8Conference Paper

Superscalar instruction issue in an asynchronous microprocessor : Asynchronous architectureENDECOTT, P. B.IEE proceedings. Computers and digital techniques. 1996, Vol 143, Num 5, pp 266-272, issn 1350-2387Article

Hierarchical verification of asynchronous circuits using temporal logicMISHRA, B; CLARKE, E.Theoretical computer science. 1985, Vol 38, Num 2-3, pp 269-291, issn 0304-3975Article

Paired T-element design for multiple-state acknowledge dependencyTAYLOR, R. A; REESE, R. B.Electronics letters. 2013, Vol 49, Num 19, pp 1213-1214, issn 0013-5194, 2 p.Article

High speed externally asynchronous/internally clocked systemsVANSCHEIK, W. S; TINDER, R. F.IEEE transactions on computers. 1997, Vol 46, Num 7, pp 824-829, issn 0018-9340Article

Automatic verification of asynchronous circuits using temporal logicDILL, D. L; CLARKE, E. M.IEE proceedings. Part E. Computers and digital techniques. 1986, Vol 133, Num 5, pp 276-282, issn 0143-7062Article

SPIN-SIM : Logic and fault simulation for speed-independent circuitsFENG SHI; MAKRIS, Yiorgos.International Test Conference. 2004, pp 597-606, isbn 0-7803-8580-2, 1Vol, 10 p.Conference Paper

  • Page / 15