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VERTICAL P-N-P FOR COMPLEMENTARY BIPOLAR TECHNOLOGYMAGDO IE.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 459-461; BIBL. 3 REF.Article

GIGABIT LOGIC BIPOLAR TECHNOLOGY: ADVANCED SUPER SELF-ALIGNED PROCESS TECHNOLOGYSAKAI T; KANAKA S; KABAYASHI Y et al.1983; ELECTRONICS LETTERS; ISSN 0013-5194; GBR; DA. 1983; VOL. 19; NO 8; PP. 283-284; BIBL. 3 REF.Article

BIPOLAR SEMI-CUSTOM ICS IN NON ENTERTAINMENT CONSUMER APPLICATIONSBRAY D.1981; IEEE TRANS. CONSUM. ELECTRON.; ISSN 0098-3063; USA; DA. 1981; VOL. 27; NO 1; PP. 91-101Article

POWER COMPONENTS MELD THE STRENGTHS OF MOS, BIPOLAROHR S.1980; ELECTRON. DESIGN; USA; DA. 1980; VOL. 28; NO 14; PP. 65-71Article

A 1-MU M BIPOLAR VLSI TECHNOLOGYEVANS SA; MORRIS SA; ARLEDGE LA JR et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 438-444; BIBL. 11 REF.Article

STANDARD BIPOLAR PROCESS YIELDS 12-BIT MONOTONIC D-A CONVERTERSCHOEFF JA.1979; ELECTRONICS; USA; DA. 1979; VOL. 52; NO 25; PP. 152-158Article

CIRCUITS INTEGRES SEMICONDUCTEURS DE MEMOIRE A STRUCTURES BIPOLAIRES TRANSISTORISEESORLIKOVSKIJ AA.1977; MIKROELEKTRONIKA; S.S.S.R.; DA. 1977; VOL. 6; NO 6; PP. 477-490; BIBL. 1 P. 1/2Article

SECONDER FOR BI-POLAR TECHNOLOGY. A RE-EVALUATION.ROBERTS DH.1974; MICROELECTRONICS; G.B.; DA. 1974; VOL. 6; NO 2; PP. 18-21; BIBL. 5 REF.Article

SILICON PROCESSING. III1978; REV. PHYS. APPL.; FRA; DA. 1978; VOL. 12; NO 13; PP. 845-850; ABS. FRE; BIBL. 6 REF.Conference Paper

SCHNELLES I2L-MULTIPLIZIER- UND DIVIDIERFELD = RESEAU MULTIPLICATEUR ET DIVISEUR RAPIDE EN TECHNOLOGIE BIPOLAIRE A INJECTION DE COURANT I2LKRAHL I; ZINDT R.1980; RADIO FERNSEHEN ELEKTRON.; DDR; DA. 1980; VOL. 29; NO 3; PP. 150-154; BIBL. 13 REF.Article

4096 BIT AND LARGER BIPOLAR STATIC RANDOM ACCESS MEMORIESHERNDON WH; HO W; ONG W et al.1980; MICROELECTRONICS J.; ISSN 0026-2692; GBR; DA. 1980; VOL. 11; NO 5; PP. 12-14; BIBL. 9 REF.Article

BIPOLAR D/A: A HIGH SPEED COMPLETE DATA CONVERTERSCHROY DM.1979; MIDCON 79 CONFERENCE/1979/CHICAGO IL; USA; LOS ANGELES: IMPR. AMERICAN OFFSET PRINTERS; DA. 1979; NO 1/1; 7 P.; BIBL. 4 REF.Conference Paper

FIRST-IN FIRST-OUT UNIT. IS FAST, DENSE.SCRUPSKI SE.1976; ELECTRONICS; U.S.A.; DA. 1976; VOL. 49; NO 23; PP. 127Article

LES MEMOIRES DYNAMIQUES BIPOLAIRES VONT-ELLES CONCURRENCER LES MOS.1976; ELECTRON. MICROELECTRON. INDUSTR.; FR.; DA. 1976; NO 227; PP. 49Article

ELEVATED ELECTRODE INTEGRATED CIRCUITSSAKAI T; YAMAMOTO Y; KOBAYASHI Y et al.1979; I.E.E.E. TRANS. ELECTRON DEVICES; USA; DA. 1979; VOL. 26; NO 4; PP. 379-384; BIBL. 5 REF.Article

MTL/I2L VEREINT DIE VORTEILE DER BIPOLAR-MIT DENEN DER FET-TECHNIK. = LA TECHNIQUE MTL/I2L REUNIT LES AVANTAGES DE LA TECHNIQUE BIPOLAIRE ET DE LA TECHNIQUE A EFFET DE CHAMPHOMBURG D.1977; NACHR. ELEKTRON.; DTSCH.; DA. 1977; VOL. 31; NO 8; PP. 229-231; ABS. ANGL.Article

A 1-MU M BIPOLAR VLSI TECHNOLOGYEVANS SA; MORRIS SA; ARLEDGE LA JR et al.1980; IEEE TRANS. ELECTRON. DEVICES; ISSN 0018-9383; USA; DA. 1980; VOL. 27; NO 8; PP. 1373-1379; BIBL. 11 REF.Article

A LOW-POWER, BIPOLAR, TWO'S COMPLEMENT SERIAL PIPELINE MULTIPLIER CHIP.KANE J.1976; I.E.E.E. J. SOLID-STATE CIRCUITS; U.S.A.; DA. 1976; VOL. 11; NO 5; PP. 669-678; BIBL. 7 REF.Article

PROPOSER FOR BI-POLAR TECHNOLOGY. INTEGRATED INJECTION LOGIC - PRESENT AND FUTURE.DE TROYE NC.1974; MICROELECTRONICS; G.B.; DA. 1974; VOL. 6; NO 2; PP. 9-13; BIBL. 7 REF.Article

DESIGN TECHNIQUE FOR LOW-CURRENT GENERATORSBARKER RWJ; HART BL.1981; ELECTRON. LETT.; ISSN 0013-5194; GBR; DA. 1981; VOL. 17; NO 7; PP. 271-273; BIBL. 3 REF.Article

VERTICAL P-N-P FOR COMPLEMENTARY BIPOLAR TECHNOLOGYMAGDO IE.1980; IEEE TRANS. ELECTRON. DEVICES; ISSN 0018-9383; USA; DA. 1980; VOL. 27; NO 8; PP. 1394-1396; BIBL. 3 REF.Article

HIGH SPEED BIPOLAR MICROPROCESSOR COMPATIBLE ANALOG TO DIGITAL CONVERTEROCHI S; GILLINGS B.1979; MIDCON 79 CONFERENCE/1979/CHICAGO IL; USA; LOS ANGELES: IMPR. AMERICAN OFFSET PRINTERS; DA. 1979; NO 1/2; 4 P.Conference Paper

SILICON BIPOLAR MICROWAVE POWER TRANSISTORSALLISON R.1979; I.E.E.E. TRANS. MICROWAVE. THEORY. TECH.; USA; DA. 1979; VOL. 27; NO 5; PP. 415-422; BIBL. 33 REF.Article

AN ISOLATION TECHNIQUE FOR HIGH SPEED BIPOLAR INTEGRATED CIRCUITS.NAKAJIMA S; KATO K.1977; REV. ELECTR. COMMUNIC. LAB.; JAP.; DA. 1977; VOL. 25; NO 9-10; PP. 1039-1051; BIBL. 4 REF.Article

BIPOLAR INJECTION LOGIC TECHNOLOGY.HARDING J.1977; NEW ELECTRON.; G.B.; DA. 1977; VOL. 10; NO 4; PP. 103-104 (2P.)Article

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