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VERTICAL P-N-P FOR COMPLEMENTARY BIPOLAR TECHNOLOGYMAGDO IE.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 459-461; BIBL. 3 REF.Article

Realisierung von nachrichtensperifischen Schaltkreisen mit Hilfe von Halbkundentechniken der Bipolartechnologie = La réalisation de circuits spécifiques pour les télécommunications à l'aide de technologies semi personnalisées en technologie bipolaire = The realization of circuits ― for telecommunications with semi personalized technologies in bipolar technologyTÜNGLER, V; WARNING, D; HAMANN, O et al.Nachrichtentechnik. Elektronik. 1986, Vol 36, Num 1, pp 24-26, issn 0323-4657Article

Novel low temperature RF plasma annealing using NH3-N2 gas mixtureAITE, K; RAGAY, F. W; MIDDELHOEK, J et al.Electronics Letters. 1990, Vol 26, Num 11, pp 733-734, issn 0013-5194, 2 p.Article

Lateral charge spreading-induced effects within a shallow junction bipolar technologyHEMMERT, R. S; PAN, L. S; ALTIERI, J et al.Journal of applied physics. 1984, Vol 55, Num 2, pp 463-470, issn 0021-8979Article

60GHz transceiver circuits in SiGe bipolar technologyREYNOLDS, Scott; FLOYD, Brian; PFEIFFER, Ullrich et al.IEEE International Solid-State Circuits Conference. 2004, pp 442-443, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Application of radiation-tolerant field oxides and passivation films to the bipolar IC processKATO, M; WATANABE, K; OKABE, T et al.I.E.E.E. transactions on electron devices. 1988, Vol 35, Num 12, pp 2333-2337, issn 0018-9383Article

A 108Gb/s 4:1 Multiplexer in 0.13μm SiGe-bipolar technologyMEGHELLI, Mounir.IEEE International Solid-State Circuits Conference. 2004, pp 236-237, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

A high-performance bipolar/CMOS process―CIT2VOLZ, C; BLOSSFELD, L.I.E.E.E. transactions on electron devices. 1988, Vol 35, Num 11, pp 1861-1865, issn 0018-9383, 1Article

Self-aligned bipolar technology. New chances for very-high-speed digital integrated circuitsWIEDER, A. W.Siemens Forschungs- und Entwicklungsberichte. 1984, Vol 13, Num 5, pp 246-252, issn 0370-9736Article

GIGABIT LOGIC BIPOLAR TECHNOLOGY: ADVANCED SUPER SELF-ALIGNED PROCESS TECHNOLOGYSAKAI T; KANAKA S; KABAYASHI Y et al.1983; ELECTRONICS LETTERS; ISSN 0013-5194; GBR; DA. 1983; VOL. 19; NO 8; PP. 283-284; BIBL. 3 REF.Article

BIPOLAR SEMI-CUSTOM ICS IN NON ENTERTAINMENT CONSUMER APPLICATIONSBRAY D.1981; IEEE TRANS. CONSUM. ELECTRON.; ISSN 0098-3063; USA; DA. 1981; VOL. 27; NO 1; PP. 91-101Article

POWER COMPONENTS MELD THE STRENGTHS OF MOS, BIPOLAROHR S.1980; ELECTRON. DESIGN; USA; DA. 1980; VOL. 28; NO 14; PP. 65-71Article

A 1-MU M BIPOLAR VLSI TECHNOLOGYEVANS SA; MORRIS SA; ARLEDGE LA JR et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 438-444; BIBL. 11 REF.Article

CIRCUITS INTEGRES SEMICONDUCTEURS DE MEMOIRE A STRUCTURES BIPOLAIRES TRANSISTORISEESORLIKOVSKIJ AA.1977; MIKROELEKTRONIKA; S.S.S.R.; DA. 1977; VOL. 6; NO 6; PP. 477-490; BIBL. 1 P. 1/2Article

SECONDER FOR BI-POLAR TECHNOLOGY. A RE-EVALUATION.ROBERTS DH.1974; MICROELECTRONICS; G.B.; DA. 1974; VOL. 6; NO 2; PP. 18-21; BIBL. 5 REF.Article

Influence of device parameters on the switching speed of BICMOS buffersPOSSEEL, G. P; DUTTON, R. W.IEEE journal of solid-state circuits. 1989, Vol 24, Num 1, pp 90-99, issn 0018-9200, 10 p.Article

STANDARD BIPOLAR PROCESS YIELDS 12-BIT MONOTONIC D-A CONVERTERSCHOEFF JA.1979; ELECTRONICS; USA; DA. 1979; VOL. 52; NO 25; PP. 152-158Article

Calculation of critical charge of bipolar memory circuitsZHANG, X.IEEE journal of solid-state circuits. 1989, Vol 24, Num 1, pp 187-189, issn 0018-9200, 3 p.Article

A subnanosecond 2000 gate array with ECL 100K comptabilitySATO, F; TAKAHASHI, T; MISAWA, H et al.IEEE journal of solid-state circuits. 1984, Vol 19, Num 1, pp 5-9, issn 0018-9200Article

Semiconductor memory trendsASAI, S.Proceedings of the IEEE. 1986, Vol 74, Num 12, pp 1623-1635, issn 0018-9219Article

Electronically controlled active-c filters and equalicers with operational transconductance amplifiersMALVAR, H. S.IEEE transactions on circuits and systems. 1984, Vol 31, Num 7, pp 645-649, issn 0098-4094Article

A 40 ns 64 kbit junction-shorting PROMFUKUSHIMA, T; UENO, K; MATSUZAKI, Y et al.IEEE journal of solid-state circuits. 1984, Vol 19, Num 2, pp 187-194, issn 0018-9200Article

SILICON PROCESSING. III1978; REV. PHYS. APPL.; FRA; DA. 1978; VOL. 12; NO 13; PP. 845-850; ABS. FRE; BIBL. 6 REF.Conference Paper

Signal processor chip implementationBERAUD, J. P.IBM journal of research and development. 1985, Vol 29, Num 2, pp 140-146, issn 0018-8646Article

Circuit modeling of bipolar transistors for BiCMOSDOYLE, D. J. F; LANE, W. A.IEEE journal of solid-state circuits. 1989, Vol 24, Num 1, pp 189-193, issn 0018-9200, 5 p.Article

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