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SIMULATION OF A DISCRETE PLL WITH VARIABLE PARAMETERSROCHA LF.1979; PROC. I.E.E.E.; USA; DA. 1979; VOL. 67; NO 3; PP. 440-442; BIBL. 3 REF.Article

Pull-in range of phase lock loops of the type twoKROUPA, V. F.AEU. Archiv für Elektronik und Übertragungstechnik. 1985, Vol 39, Num 1, pp 37-44, issn 0001-1096Article

Fast timing recovery for linearly and non-linearly modulated systemsKAI SHI; SERPEDIN, Erchin.Asilomar Conference on Signals, Systems & Computers. 2004, isbn 0-7803-8622-1, 2Vol, vol 1, 1015-1019Conference Paper

Fast and accurate behavioral simulation of fractional-n frequency synthesizers and other PLL/DLL circuitsPERROTT, Michael H.Design automation conference. 2002, pp 498-503, isbn 1-58113-461-4, 6 p.Conference Paper

Complicated, but rational, phase-locking responses of a simple time-base oscillatorALLEN, T.IEEE transactions on circuits and systems. 1983, Vol 30, Num 9, pp 627-632, issn 0098-4094Article

A 10μs fast switching PLL synthesizer for a GSM/EDGE base-stationKEAVENEY, Mike; WALSH, Patrick; TUTHILL, Mike et al.IEEE International Solid-State Circuits Conference. 2004, pp 192-193, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Theorie des PLL mit Rechteckcharakteristik das Phaseudetektors und PI-Zegelfilter. I = Theory of the PLL with rectangular phase detector characteristic and with PI control filter. IHOFFMANN, M. H. W.Frequenz. 1989, Vol 43, Num 6, pp 167-171, issn 0016-1136, 5 p.Article

A novel phase-lock loop acquisition performance measureHASAN, P.AEU. Archiv für Elektronik und Übertragungstechnik. 1986, Vol 40, Num 6, pp 405-407, issn 0001-1096Article

Modélisation et étude du contrôle actif synchrone des bruits d'écoulements pulsés = Modelling and study of synchronous active control of noise from pulsed flowsDouerin, Anne; De Coligny.1992, 161 p.Thesis

Synchronization of chaos in phase-locked loopsENDO, T; CHUA, L. O.IEEE transactions on circuits and systems. 1991, Vol 38, Num 12, pp 1580-1588, issn 0098-4094Article

Chaos from phase-locked loops. II: High-dissipation caseENDO, T; CHUA, L. O; NARITA, T et al.IEEE transactions on circuits and systems. 1989, Vol 36, Num 2, pp 255-263, issn 0098-4094, 9 p.Article

DIGITAL PHASE LOCKED LOOPS1972; IN: INT. FOUND. TELEMETERING. INT. TELEMETERING CONF.; LOS ANGELES, CALIF.; 1972; WASHINGTON, D.C.; INT. FOUND. TELEMETERING; DA. 1972; PP. 89-148; BIBL. DISSEM.Serial Issue

Phase-locked loop based linearly controlled three-phase firing circuit for an AC controllerHAQUE, S. E; KHAN, A. A; SMIAI, M. S et al.International journal of electronics. 1985, Vol 58, Num 5, pp 761-767, issn 0020-7217Article

Expressions with discontinuous weight function for obtaining the cycle-slip property in the second-order phase-locked loopUCHIDA, Y.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1983, Vol 66, Num 8, pp 475-480, issn 0387-236XArticle

A method for tracking power line frequency with millihertz resolution and high/low cut-offSEN, S. K; DEB, A; ROY, A et al.Electric power systems research. 1992, Vol 23, Num 3, pp 239-243, issn 0378-7796Article

A phase-locked loop for driving vibrating tube densimetersWOOD, R. H; BUZZARD, C. W; MAJER, V et al.Review of scientific instruments. 1989, Vol 60, Num 3, pp 493-494, issn 0034-6748Article

Digital phase-locked loop with jitter boundedWALTERS, S. M; TROUDET, T.IEEE transactions on circuits and systems. 1989, Vol 36, Num 7, pp 980-987, issn 0098-4094, 8 p.Article

Loop gain compensation in phase-locked loopsYEAGER, R.RCA review. 1986, Vol 47, Num 1, pp 78-87, issn 0033-6831Article

Fast switching frequency synthesizer employing adaptive phase locked loopKHADOURI, S. H; AL-ARAJI, S. R; ALLOW, J. E et al.IEEE transactions on consumer electronics. 1985, Vol 31, Num 4, pp 680-686, issn 0098-3063Article

Modèle échantillonné de boucles à verrouillage de phase = Sampled model of phase lock loopsDEMORISE, J. C; CUNHA, H. JR; ABIGNOLI, M et al.International journal of modelling & simulation. 1984, Vol 4, Num 1, pp 25-28, issn 0228-6203Article

A fully integrated 13GHz ΔΣ fractional-N PLL in 0.13μm CMOSTIEBOUT, Marc; SANDNER, Christoph; WOHLMUTH, Hans-Dieter et al.IEEE International Solid-State Circuits Conference. 2004, pp 386-387, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Modeling of chaotic characteristics in integrated phase-locked loopSIU, W. K; WONG, H; CHEUNG, T. S et al.International conference on microelectronic. 1997, pp 751-754, isbn 0-7803-3664-X, 2VolConference Paper

PHASE-LOCKED LOOPS USED WITH MASERS: ATOMIC FREQUENCY STANDARDSVANIER J; TETU M.1982; IEEE TRANSACTIONS ON COMMUNICATIONS; ISSN 0090-6778; USA; DA. 1982; VOL. 30; NO 10; PP. 2355-2361; BIBL. 33 REF.Article

PULL-OUT FREQUENCY OF SECOND ORDER PHASE-LOCKED-LOOP = FREQUENCE DE DECROCHAGE D'UNE BOUCLE A VERROUILLAGE DE PHASE DU SECOND ORDRELOCHERER KH; HERMANNSEN J.1981; AEUE ARCH. ELEKTRON. UEBERTRAGUNGSTECH.; ISSN 0001-1096; DEU; DA. 1981; VOL. 35; NO 12; PP. 495-496; ABS. GER; BIBL. 2 REF.Article

AN EXTENSION OF THE GILL AND GUPTA DISCRETE PHASE-LOCKED LOOPCERNUSCHI FRIAS B; ROCHA LF.1980; PROC. I.E.E.E.; USA; DA. 1980; VOL. 68; NO 3; PP. 424-425; BIBL. 3 REF.Article

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